I would like to have a minimalistic cpu schematic with as few gates as possible and it should be inspired by the simplicity of the 6502. The cpu could be 4 bit, Harvard architecture. The idea is to make the cpu, so that it can be constructed with different technologies(mechanical, pneumatic or other exotic methods), or as virtual cores. Also the cpu should be made as fast as possible, and useful(oversimplifying may lead to extremely poor performances). I would appreciate any help with this.

Edit: It would be good if it would be a bit-slice cpu(it doesn't have to be).

Look up the manual to the arcade game Star Castle. It is a 12 bit based on the PDP-11 and built up from TTL and has a good explanation of how it all works. Good starting point to play with...

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here's another link:

http://www.bradrodriguez.com/papers/piscedu2.htm

its a 16 bit mpu but that could probably be reduced (or expanded) as needed. The schematic is linked at the bottom of the page.

Daryl

So do you want to make your own processor, or are you thinking of a CPU board and you put this in the "Programmable Logic" section because you expect that programmable logic is needed to minimize the glue logic and maybe I/O too?

As for getting the most processor power in the least number of gates in the processor itself, the best ratio seems to come from stack processors. Their assembly language is basically Forth. Book "Stack Computers: The New Wave" downloadable here. One I remember seeing the announcement for over 20 years ago from Silicon Composers, Inc, was the Harris RTX2000 which ran at 16-20MHz and did approximately one Forth instruction per cycle but with optimization in the compilation, could peak out at four instructions per cycle (burst only). I don't think it really took any significant pipelining or branch prediction etc. to achieve it. To get that kind of performance over 20 years ago was really screaming; yet it was a pretty simple processor. To get the same sustained performance from a 6502 running indirect-threaded Forth like I do would require well over a GHz. IIRC, interrupt latency was 4 clocks, and return from interrupt was zero clocks. I think the SC32 was kind of the bigger brother to the RTX2000, with wider buses.

Thanks for the tips, the cpu doesn't necessary have to be built from scratch. I placed this topic here, because i was expecting at some point to try to make it using programmable logic, or at least a part of it(i do have some 74LS181).
Also because a complete hdl core could be made.

Lots of links about stack computers are at http://www.ultratechnology.com/chips.htm . Some of the links are dead and some redirect after a few seconds, but there still seems to be quite a bit there. The i21 processor link says it does 500MIPS in a 68-pin PLCC, and has video and other things onboard that aren't normally onboard. I know some of these get the fantastic MIPS rates by routinely doing several instructions per clock. You'll also find Don Golding's VHDL code there for a stack processor, and it's surprisingly short. Besides just being able to use smaller & cheaper FPGA's, another part of his goal was to have it simple enough that you can put multiple processors in a single FPGA if you like.

I would sure like to find out what happened to Rob Finch who is a member here. He also has a microprocessor-design forum on Yahoo Forums which was rather 6502-oriented but I have not been able to get hold of him in a couple of years.

Ruud, also a member here, has a web page on building your own 6502 with TTL at http://www.baltissen.org/newhtm/ttl6502.htm .

There was recently a post here (hopefully someone can remember enough search terms to find it) about a 6502-like processor someone designed as a hobby that was much simpler because it lacked and least one of the index registers and most of the indirect and indexed addressing modes. It may have only had something like 32 op codes. Anyone remember?

It has been mentioned that you could also emulate a processor of your own design using a microcontroller-- although its performance would be poor.

See my post about an available book on microprocessor design, at viewtopic.php?p=8549#8549

Yes, I'm pretty sure BigEd had posted it. I think 'the author' fit it into a CPLD. I could be wrong, memory is not serving me very well. I will look further...


The 65Org16 takes very little resources as well, at least in a Spartan 6 FPGA, especially if external RAM/ROM is used instead of internal BlockRAM, although this would take away from the top-speed aspect...

Here it is. Was made recently by Steve Chamberlin who did Big Mess O' Wires. Another breadboard fan . But seems he went right into HDL?... Nice transition!

Thanks. Wow-- on a CPLD! 36 op codes. I bookmarked it.

A very talented fellow! I was admiring his web site (no longer online) when much to my astonishment I discovered Rob is a neighbor of mine. This is a small town, so the coincidence seems remarkable. However, we've never met -- there's just an extremely sporadic email correspondence. He says he's been absorbed with more non-electronic things recently -- but ends up talking about the subject anyway! I'll let him know he's missed, & ask him to look you up if you like.

-- Jeff

Yes! I was afraid he had died or something. Have him check in on the forum at least and update his email address in his profile. I tried several different ways to get hold of him, but had no success. That might have been just before we started talking about the 65Org32 in the long topic "Improving the 6502, some ideas".

What about a 4 bit cpu, with 16 instructions, with less than 100 gates, or fitting it in a XC9572?
Is it possible?

Here's a 4-bit machine:
http://www.vttoth.com/CMS/index.php/pro ... ck-diagram

Yes. http://opencores.org/project,mcpu

Well, it's a CPU on a XC9572. I haven't looked at the architecture.

Actually, I read in the doc's it fits in a XC9536, Xilinx' smallest CPLD.