Can not get 6551 to connect to pc

[kozlojak]

I have tried many different wiring Schematics this is the one I have setup now http://members.multimania.co.uk/leeedav ... index.html

I am using a 9pin Null modem cable to my computer. I am using putty and have tried all the different flow controlls but can just not get it to work. When I check the pins it looks like the 6551 is not sending out the bits to the serial port. I was able to get it to go by grounding out all the pins except the tx pin, but the pc terminal would still not disply the sent char.

I am using the below simple code to send a single letter over and over to the 6551 and from what I can tell it seems to be sending the correct information the to the chip.

Quote:

*=$E000

ACIADATA = $A001 ;ACIA Data register
ACIACONTROLL = $A003 ;ACIA Controll register
ACIACOMMAND = $A002 ;ACIA Command register
ACIASTATUS = $A001 ;ACIA status register

NMI_VEC = $0000 ;NMI vector Not used
RES_VEC = $E000 ;RESET vector
IRQ_VEC = $0000 ;IRQ vector

START
LDA #$1E ;9600/8/1
STA ACIACONTROLL ;Write Controll Register
LDA #$0B ;N parity/echo off/rx int off/ dtr Active
STA ACIACOMMAND ;Write Command Register
LDA ACIASTATUS ;Read and clear status register

LOOP
LDA #$41 ;load the letter 'a' into A
STA ACIADATA ;write to serial port
JMP LOOP ;loop

*=$FFFA
.word NMI_VEC ; NMI vector(not used)
.word RES_VEC ; RESET vector
.word IRQ_VEC ; IRQ vector(not used)

[fachat]

Just a quick answer. I don't think it is advisable to just store data into the serial output register before the original value has not shifted out completely. Worst case it just restarts and you would see nothing. Add either a delay loop or a check that the byte has been shifted out into your loop.

Also, I am not sure if interrupts are generated in your setup (most likely not, I didn't use the 6551 for ages so I don't know which registers have to be set up, and I'm too lazy to look it up now... but just to be sure). If so, your CPU would fetch the IRQ vector, go there ($0000) and not send any further data. Probably check the interrupt pin.

André

[leeeeee]

You must wait for the Tx buffer to be empty or nothing will get sent.

[GARTHWILSON]

First, for showing your code without losing the spaces you put there for readability, use [code] and [/code], not [quote] and [/quote]. (I did something else here to make the directives show instead of doing their job.)

I can't tell what the connections are to the D-sub connector pins. Going pin number for pin number, most of them line up correctly for a DB-9, but then I see a DB-25 in the picture. For a DB-9, it looks like you have your CTS input connected to the DSR pin, but no DTR output to feed it through the nul modem. CTS should be on pin 8. For a DB-9, RTS & CTS are pin 7 & 8 respectively, whereas for a DB-25, they're 4 & 5; so even just crossing them won't get the desired result if you're not on the right connector.

[leeeeee]

Quote:

I can't tell what the connections are to the D-sub connector pins.

The connections aren't shown for the D connector but for the most common PC motherboard COM port IDC header layout. This means that using the at the time of writing, readily available cables, you can use either a 9 or 25 pin D connector as you choose.

Lee.

[kozlojak]

Thanks for the tips, I have changed to code to be sure that it checks the TX buffer, and double checked my wireing, From what I can tell it should work with even just the tx and rx conneted and the other pins grounded.

the RTS pin is alwase high, what conditions cause it to run high?

Code: Select all

*=$E000

ACIADATA = $A001 		;ACIA Data register
ACIACONTROLL = $A003            ;ACIA Controll register
ACIACOMMAND = $A002	;ACIA Command register
ACIASTATUS = $A001	;ACIA status register

NMI_VEC = $0000	                ;NMI vector Not used
RES_VEC	= $E000		;RESET vector
IRQ_VEC	= $0000		        ;IRQ vector

START
  LDA #$1E  		        ;9600/8/1
  STA ACIACONTROLL		;Write Controll Register
  LDA #$0B		        ;N parity/echo off/rx int off/ dtr Active
  STA ACIACOMMAND		;Write Command Register
  LDA ACIASTATUS		;Read and clear status register

LOOP
  LDA ACIASTATUS		;Get ACIA Status
  AND #$10			;check tx empty
  BEQ LOOP			;loop if not
  LDA #$41                      ;load the letter 'a' into A
  STA ACIADATA                  ;write to serial port
  JMP LOOP                      ;loop

*=$FFFA					
  .word	NMI_VEC		        ; NMI vector(not used)
  .word	RES_VEC		        ; RESET vector
  .word	IRQ_VEC		        ; IRQ vector(not used)

[BigDumbDinosaur]

kozlojak wrote:

Thanks for the tips, I have changed to code to be sure that it checks the TX buffer, and double checked my wireing, From what I can tell it should work with even just the tx and rx conneted and the other pins grounded.

the RTS pin is alwase high, what conditions cause it to run high?

Code: Select all

*=$E000

ACIADATA = $A001 		;ACIA Data register
ACIACONTROLL = $A003            ;ACIA Controll register
ACIACOMMAND = $A002	;ACIA Command register
ACIASTATUS = $A001	;ACIA status register

NMI_VEC = $0000	                ;NMI vector Not used
RES_VEC	= $E000		;RESET vector
IRQ_VEC	= $0000		        ;IRQ vector

START
  LDA #$1E  		        ;9600/8/1
  STA ACIACONTROLL		;Write Controll Register
  LDA #$0B		        ;N parity/echo off/rx int off/ dtr Active
  STA ACIACOMMAND		;Write Command Register
  LDA ACIASTATUS		;Read and clear status register

LOOP
  LDA ACIASTATUS		;Get ACIA Status
  AND #$10			;check tx empty
  BEQ LOOP			;loop if not
  LDA #$41                      ;load the letter 'a' into A
  STA ACIADATA                  ;write to serial port
  JMP LOOP                      ;loop

*=$FFFA					
  .word	NMI_VEC		        ; NMI vector(not used)
  .word	RES_VEC		        ; RESET vector
  .word	IRQ_VEC		        ; IRQ vector(not used)

I seem to vaguely recall that there is some sort of issue involving the CD input to the 6551. Dunno if it the case with the version of the 6551 you have, but deep memory says that there will be no throughput unless CD is asserted. The only data sheet I have for the UART is the WDC 65C51 and I'm not sure it its behavior is the same as the NMOS part. If I get a some time I'll read the data sheet and see if my thinking is on or off the rails.

[GARTHWILSON]

DCD\ (data carrier detect) must be low for the receiver to operate but it does not affect the transmitter, either in NMOS or CMOS. He has DCD\ connected to DSR\ anyway, so as long as DSR\ is true, DCD\ will be too.

[kozlojak]

Well, With all the problems I have been having with it I ordered a G65SC51P-2 and will try that when it arrives and report back if it helped

[kozlojak]

Well I got the new chip, but I am still having problems. CTA and RTS are both low, so it should be able to send, but it wont the RxD and TxD pins stay high with no movement. If I pull the TxD wire I will get gibberish on the pc. anyone have any other ideas?

[fachat]

Actually I think the 6551 is pretty much brain-dead concerning handshaking. The datasheet says "The /CTS input pin controls the transmitter operation. The enable state is with /CTS low. The transmitter is automatically disabled if /CTS is high". Unfortunately this switch is instantaneously, so you cannot use it for a decent flow control (e.g. the receiver finds its buffer is close to being full, so it sets /CTS high - but in the meantime the 6551 started to transmit a new byte, which is cut off in mid transmission...). I never used /CTS again once I found this out.

In fact the only handshake pin I used from the ACIA is /DSR, and I connected it to the /CTS signal, so it works independently from the transmitter and does not cut off bytes in the middle of a transmission.

Also if you want to set the /RTS signal, this automatically enables/disables the transmitter (even in mid transmission). You have to watch for the timing yourself. The same for the /DTR signal. "/DTR also enables and disables the transmitter and receiver". Looking at the specs I don't even see a way where the software can actually see the actual state of the /CTS signal, but I may oversee that right now.

Due to these quirks I abandoned the ACIA 6551 decades(*) ago ;-) Sorry if I have to say that, but I always wonder why people still want to use this ... whatever ... chip...

See http://www.6502.org/users/andre/csa/key/ for an example how I solved this solution with the ACIA, using extra I/O for example. Or look here http://www.6502.org/users/andre/icaphw/c64ser.html for how I since then used a UART 16550 as RS232 interface chip.

In your case, you probably have to set all the interface signals correctly, i.e. in the ACIA set /DTR and /RTS low (by software), on the hardware interface make sure /RTS and /DCD are kept low.

André

(*) ok, over 14 years now, but I always wanted to say something like this about the ACIA at some time ;-)

[8BIT]

Are you using a crystal or a TTL Oscillator for the XTL inputs?

I have had problems with the crystal not running. What capacitor value are you using? The datasheets show 30pf but I have found 22pf works better.

I too do not think very highly of this IC. I like the Xicor chips as they offer some with motorola bus interface that can connect straight to the 6502 bus. They also will run much faster than the 6551 can.

Good luck!

Daryl

[kozlojak]

I am using a TTL Oscillator. All the control pins look to be correct and are all tied low, or properly low.

Maybe I will try a crystal.

If the 6551 is not transmitting shouldn't the TxD pin be running low Instead of High?

[GARTHWILSON]

Quote:

Actually I think the 6551 is pretty much brain-dead concerning handshaking. The datasheet says "The /CTS input pin controls the transmitter operation. The enable state is with /CTS low. The transmitter is automatically disabled if /CTS is high". Unfortunately this switch is instantaneously, so you cannot use it for a decent flow control (e.g. the receiver finds its buffer is close to being full, so it sets /CTS high - but in the meantime the 6551 started to transmit a new byte, which is cut off in mid transmission...).

That's true of the NMOS version, but not CMOS.  I'm looking at the Rockwell 65c51 data sheet which has a lot more diagrams than many other manufacturers' data sheets do and it specifically shows the byte getting finished after CTS\ goes high, and says this is the case unless CTS\ went high during the start bit (ie, no data sent yet) or you're in echo mode.

Since you have the ACIA's XTAL1 input (pin 6) connected to your 1.8432MHz phase-2 clock, you shouldn't have to worry about lacking a valid clock there.

I keep trying to figure out what could be the problem here, because although I could wish that a few things about the design were different, I have never had an actual problem with it (except when I lacked the 22pF capacitor hung on the crystal).  I've never used the NMOS one though.  I have three 4MHz ACIAs in my workbench computer and they run fine to a few MHz more than that.

Quote:

If the 6551 is not transmitting shouldn't the TxD pin be running low Instead of High?

When we say "low" or "high," that's at the pin on the ACIA itself, not on the other side of the line driver or receiver.  The idle state on the TxD and RxD pins is high.  When there's data, the start bit makes it dive to 0V (or close to it).  The stop bit is high again, and the line stays there until there's another byte ready.

[fachat]

GARTHWILSON wrote:

That's true of the NMOS version, but not CMOS. I'm looking at the Rockwell 65c51 data sheet which has a lot more diagrams than many other manufacturers' data sheets do and it specifically shows the byte getting finished after CTS\ goes high, and says this is the case unless CTS\ went high during the start bit (ie, no data sent yet) or you're in echo mode.

Yes, you're right. I have the Rockwell Controller Products Data Book from 1987 I looked up the NMOS description I gave. The /CTS handling has changed, which is good, as this was the most annoying point. But my other points still hold, though...

André