Assember question BBS/BBR

[diyhouse]

Hi folks,. I am using the tass assembler and I am having trouble with 65C02 BBS0, BBR0, instructions,.. in that it does not seem to support them, I tried the 64tass variant, which although improved still does not appear to support BBS0 type instructions.
I have tried some variants on syntax but no luck, does anyone else know of an alternative assembler or perhaps a macro fix, ( although I'm not clear how to calculate the jump offset ), or just the correct syntax I should use.

Many thanks

[leeeeee]

The Mitsubishi assembler I use insists on whitespace between the branch and the bit number so the format is ..

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	BBx	n,op,addr

.. where n is the bit number, op is A or an address and addr is the branch target address.

Lee.

[teamtempest]

Quote:

I am using the tass assembler and I am having trouble with 65C02 BBS0, BBR0, instructions

Strictly speaking those are not original 65c02 instructions at all. They are R65c02 instructions, ie., they were added to the Rockwell variant of the 65c02. The W65c02s also supports them.

Many assemblers do support those instructions directly, including my HXA assembler. Just to show off the macro and include capabilities of HXA there's also a demo implementing the R65c02 instruction set entirely as macros (the 65c02 macro implementation file is first included, then the 32 new Rockwell instructions are defined).

Anyhow, the Rockwell BBxx instructions as macros might look something like this on other assemblers:

.macro BBR0 zpaddr,target
.byte $0f
.byte zpaddr
.byte target-*+1
.endm

or if macros do not have explicitly named arguments but only implied numbered ones (ala Merlin):

.macro BBR0
.byte $0f
.byte ]1
.byte ]2-*+1
.endm

where "*" means "the value of the program counter at this point".

[BigDumbDinosaur]

teamtempest wrote:

Strictly speaking those are not original 65c02 instructions at all. They are R65c02 instructions, ie., they were added to the Rockwell variant of the 65c02. The W65c02s also supports them.

Note that the W65C816S doesn't implement the BBR instructions, even when operating in emulation mode.

I personally never found a use for them. They seemed contrived, almost intended to solve a specific hardware issue. That it was Rockwell who implemented them suggests a fix for some sort of modem chip problem (Rockwell modem chips were quite common at one time). In the '816, the BBRx opcodes were diverted to more useful operations.

[BitWise]

Rockwell produced a number of microcontroller versions of the 6502 which had peripheral registers on zero page. The bit instructions would make accessing and testing these registers more efficient than using sequences of standard 6502 instructions like ...

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LDA #mask
BIT register
BNE bitset

[GARTHWILSON]

I have not used these four instructions myself either, but I've never had my I/O in ZP. The BIT instruction partly fills in. Even without regard to what's in any of the processor registers, BIT directly transfers bits 7 and 6 to the N and V flags to test directly without loading the byte and ANDing, so I reserve bits 6 and 7 in I/O locations for certain things to quickly test them. For toggling a clock line on a bit-banged synchronous-serial link, I use bit 0 because as long as you know what state it's in, you can move it up or down with INC and DEC, one read-modify-write instruction per operation.

[diyhouse]

Guys,.. Many thanks for all your responses,.. I have tried a alternative assembler as supplied by one of the contributors,.. written in java it does support the BBXX op-codes, and runs in conjunction with a linker.

I do like the macro implementation though,.. that is quite neat!!

Tx and Regards