Here are some details related to the code involved. First a timming diagram:
It is clear that a minimum 14 cycles are needed between SR write and IRB read.
And the code involved:
Code:
; Single transfer
; 14 cycles between WR and RD
spibyte:
sta SR ; 4 cycles
jsr delrts ; 12 cycles
nop ; 2 cycles
lda IRB ; 4 cycles
delrts: rts
In order to achieve a higher speed with the SD card, I'm using the following routines for block transfers:
Code:
; Block transfer (up to 256 bytes), write
; ptr1 -> data source
; Y: # of bytes (minimum:1, 0=256)
; 19 us/byte (421 Kbit/s)
;------ Not yet tested ------
spiwr:
sty tmp1
ldy #0
spiwr1:
lda (ptr1),y ; 5 cycles
sta SR ; 4 cycles
nop ; 2 cycles
iny ; 2 cycles
cpy tmp1 ; 3 cycles
bne spiwr1 ; 3 cycles
rts
; Block transfer (up to 256 bytes), read
; ptr1 <- data destination
; Y: # of bytes (minimum: 2 bytes, 0=256)
; 22 us/byte (363 Kbit/s)
spird:
ldx #$ff
stx SR ; 4 cycles (dummy write)
dey ; 2 cycles
sty tmp1 ; 3 cycles
ldy #0 ; 2 cycles
nop ; 2 cycles
nop ; 2 cycles
beq spird1 ; 3 cycles
spird1:
lda IRB ; 4 cycles
stx SR ; 4 cycles (dummy write)
sta (ptr1),y ; 6 cycles
iny ; 2 cycles
cpy tmp1 ; 3 cycles
bne spird1 ; 3 cycles / 2 cycles if no taken
spird2:
nop ; 2 cycles
lda IRB ; 4 cycles
sta (ptr1),y
iny
rts
The SD sector is 512 bytes long, and, therefore, I'am calling spird twice
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