Piggy-back Mockup

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richardc64
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Piggy-back Mockup

Post by richardc64 »

I wanted to see if a skinny dip, such as a 20nS SRAM, could be piggy-backed to a wider (and possibly slower) device, such as a 70nS EEPROM.

The differences in length and # of pins of the two sacrificial ICs were unimportant for this exercise: What matters is the different widths.

I unbent the top chip's right side pins, then soldered its left side pins to the bottom chip in the usual way, with one pin bent out that might be n.c. on a bottom chip, or an address bit a bottom chip might not have. Then I soldered the unbent pins to the bottom chip's pins with short lengths of stripped wire wrap, with a wire on one pin for a hypothetical /CE. If both chips would be 28 pins /WE would be at the same location for both, but Write for the top chip might have additional (or conditional) control, such as Write Protect. Hence the 2nd wire there.

This was as much a test of my soldering -- which has lately become noticeably unsteady :( -- as of the feasibility of piggy-backing ICs of different widths.
PICT0683b.jpg
"I am endeavoring, ma'am, to create a mnemonic memory circuit... using stone knives and bearskins." -- Spock to Edith Keeler
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Dr Jefyll
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Re: Piggy-back Mockup

Post by Dr Jefyll »

Looks like you've got the problem well in hand, Richard!

BTW and FWIW, there's a rather spectacular collection of stacked IC's in this thread... including one project (in the first post) where the stack is thirty-five IC's high! :shock: :!: But I didn't notice any examples of IC's of different widths being stacked.

-- Jeff
In 1988 my 65C02 got six new registers and 44 new full-speed instructions!
https://laughtonelectronics.com/Arcana/ ... mmary.html
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richardc64
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Re: Piggy-back Mockup

Post by richardc64 »

Double thanks, Jeff. I remembered that extreme stacking thread and wanted to see if anyone else had tried stacking chips of different widths, but couldn't find it.
"I am endeavoring, ma'am, to create a mnemonic memory circuit... using stone knives and bearskins." -- Spock to Edith Keeler
plasmo
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Re: Piggy-back Mockup

Post by plasmo »

I wanted to reverse engineering this commercial MPU board from ADC Soneplex line, so I glue a CPLD on top of RAM array, glue a JTAG programming header on top of the CPLD. It was a tracer/breakpoint/debugger. After all that, I had abandoned the efforts to understand existing software and chosen to hijack the boot ROM and insert my own boot software.
Bill
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CPLD on ADC MPU .jpg
plasmo
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Re: Piggy-back Mockup

Post by plasmo »

Another example of stacked IC of different package. This is overclocked 6502 to 36Mhz. Started with CPLD at The bottom, then added PLCC44 6502, and finally SMT RAM on top, viewtopic.php?f=4&t=7433&hilit=Producti ... t=0#p97252
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36Mhz overclocked 6502.jpeg
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