Issues with 6502?

Building your first 6502-based project? We'll help you get started here.
User avatar
Michael
Posts: 633
Joined: 13 Feb 2013
Location: Michigan, USA

Re: Issues with 6502?

Post by Michael »

Would there be any advantage driving the VIA active-high chip select inputs directly with the A12 and A13 lines, besides eliminating some gates and propagation delay in the decoding circuitry? VIA-1 would be addressed at $5000..$500F while VIA-2 would be addressed at $6000..$600F.
Attachments
forum test.png
Last edited by Michael on Thu Aug 14, 2025 4:37 am, edited 1 time in total.
Niek6502
Posts: 35
Joined: 18 Jul 2025
Location: Alberta, Canada

Re: Issues with 6502?

Post by Niek6502 »

Michael wrote:
Would there be any advantage driving the VIA active-high chip select inputs directly with the A12 and A13 lines, besides eliminating some gates and propagation delay in the decoding circuitry? VIA-1 would be addressed at $5000..$500F while VIA-2 would be addressed at $6000..$600F.
The current glue I use consumes these addresses:

Code: Select all

0000-3FFF : SRAM
6000-6FFF : VIA-1
7000-7FFF : VIA-2
8000-FFFF : EEPROM
It leaves a contiguous 4000-5FFF available for me for something else (not sure what yet). At some point I plan to replace the current glue with something "tighter", probably when I want to maximize RAM (like decrease ROM that then only loads programs from storage into RAM).

Hope that makes sense.

-Niek.
User avatar
Michael
Posts: 633
Joined: 13 Feb 2013
Location: Michigan, USA

Re: Issues with 6502?

Post by Michael »

Makes perfect sense.

I just think it's kinda' neat that you can 'slot' a bunch of 6500 series peripherals into I/O space without additional address decoder logic. In my rendering of the "very basic whole-computer" diagram from the Potpourri chapter of "The Primer" I included a table of I/O slots available for 6500 series peripheral chips within the minimally decoded I/O block.

Have fun. Cheerful regards.
Forum SBC 1.png
Forum SBC 0.jpg
Forum SBC 5a.png
Forum SBC 4b.png
Last edited by Michael on Tue Nov 11, 2025 9:38 pm, edited 1 time in total.
J64C
Posts: 239
Joined: 11 Jul 2021

Re: Issues with 6502?

Post by J64C »

Hi Mike. Nice clean diagram you have there. :D

With JW2 for the CPU select, you can just put in a 3.3K pulldown and you can swap and change the CPU without having to reconfigure the board.
User avatar
GARTHWILSON
Forum Moderator
Posts: 8773
Joined: 30 Aug 2002
Location: Southern California
Contact:

Re: Issues with 6502?

Post by GARTHWILSON »

J64C wrote:
Hi Mike. Nice clean diagram you have there. :D

With JW2 for the CPU select, you can just put in a 3.3K pulldown and you can swap and change the CPU without having to reconfigure the board.
The pin-1 Vss is not a signal input, but rather a ground connection.  I imagine Bill Mensch labored over which pins of the DIP could be sacrificed to get the additional signal lines of the W65C02S, and probably didn't like the idea of eliminating that second ground connection, as it would make the rest of the circuit more vulnerable to problems from groundbounce, but perhaps felt he had no choice.  A ground connection should have the lowest impedance possible, and a 3.3K won't give any value as a ground connection for the non-WDC part.  And for the WDC part, since the VPB output is usually high, a 3.3K pulldown would result in an extra 1.5mA of supply current, just wasted.  I would stick with the jumper.
http://WilsonMinesCo.com/ lots of 6502 resources
The "second front page" is http://wilsonminesco.com/links.html .
What's an additional VIA among friends, anyhow?
J64C
Posts: 239
Joined: 11 Jul 2021

Re: Issues with 6502?

Post by J64C »

Ah my apologies, right you are. I was thinking of a different pin and didn't realise the circuit was for a generic 65C02.

I was on a totally different thought train and was thinking about W65C02 & W65C816 Interchangeability.
User avatar
BigDumbDinosaur
Posts: 9425
Joined: 28 May 2009
Location: Midwestern USA (JB Pritzker’s dystopia)
Contact:

Re: Issues with 6502?

Post by BigDumbDinosaur »

GARTHWILSON wrote:
The pin-1 Vss is not a signal input, but rather a ground connection.  I imagine Bill Mensch labored over which pins of the DIP could be sacrificed to get the additional signal lines of the W65C02S, and probably didn't like the idea of eliminating that second ground connection...
...ergo the PLCC44 package, which has two grounds (pins 1 and 23).  Aside from that, the PLCC package offers improved density, so there are two good reasons to use it instead of the DIP40 version.
x86?  We ain't got no x86.  We don't NEED no stinking x86!
Post Reply