I think that by 32 and definitely by 64 bit operation, you're going to need a a memory management unit on-die. That way, you can stick with a smaller memory model for the program (unless you need bigger) and still have process-safe operation.
Neil
The 65864
- BigDumbDinosaur
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Re: The 65864
barnacle wrote:
I think that by 32 and definitely by 64 bit operation, you're going to need a a memory management unit on-die...
...along with a 64-bit data bus to avoid performance degradation. In my opinion, such a device is no longer a 65xx processor, as the hallmark simplicity has vanished. Also, just how would it be able to run eight-bit 6502 code? At least that is possible with the 65C816.
x86? We ain't got no x86. We don't NEED no stinking x86!
Re: The 65864
A cache may solve the bus width and alignment problems while still looking simple from the programmers view. This does significantly complicate the hardware, but would make it easier to use modern SDRAM.