Re: What is the maximum number of cycles that A0 can be cons

[GARTHWILSON]

Welcome.  From Table 5-7 of the 65816 data sheet at http://6502.org/documents/datasheets/wd ... 1_2018.pdf (the table also covering the '02), it looks like the longest A0 would stay constant (not including STP and WAI instructions, or the 816's MVP and MVN instructions) might be four clocks, in relative-branch instructions where the branch is taken, across a page boundary, and the new address has the same A0 value.  I would guess the longest A1 time might be a couple of clocks longer, except I suppose that with a string of relative branches, each one taken, you could get A1 to stay the same for dozens of clocks, although I can't think of any reason to do that.  What do you have in mind?

Edit: Now the OP is gone, and I don't remember why.  I guess I should quote the post I'm replying to, even if in this case I thought it would be obvious.

[GARTHWILSON]

If there's a concern that your program could get into a loop whose exit condition is never met, and you have a 6522 VIA, you could implement a watchdog timer like I tell about in my "Tip of the Day" column, #19, at viewtopic.php?p=2322#p2322 .

[BigEd]

Watching the SYNC pin is a good way to see that the CPU is still running something.

[BigEd]

Aha! (And welcome, by the way!)

[GARTHWILSON]

SYNC will only tell you when an op code is being fetched.  This will happen even when the computer is crashed, or even if it's in controlled operation but in a loop whose exit requirements never get met.

[Virtual1]

GARTHWILSON wrote:

Welcome.  From Table 5-7 of the 65816 data sheet at http://6502.org/documents/datasheets/wd ... 1_2018.pdf (the table also covering the '02), it looks like the longest A0 would stay constant (not including STP and WAI instructions, or the 816's MVP and MVN instructions) might be four clocks, in relative-branch instructions where the branch is taken, across a page boundary, and the new address has the same A0 value.  I would guess the longest A1 time might be a couple of clocks longer, except I suppose that with a string of relative branches, each one taken, you could get A1 to stay the same for dozens of clocks, although I can't think of any reason to do that.  What do you have in mind?

Edit: Now the OP is gone, and I don't remember why.  I guess I should quote the post I'm replying to, even if in this case I thought it would be obvious.

not sure if this is OT for the question, but "back in the day" I did a fair amount of research into execution speeds of documented (and UNdocumented) opcodes. IIRC, branches cost 2 cycles if not taken, 3 if taken, and 4 if taken across a page boundary.

[BigDumbDinosaur]

Virtual1 wrote:

IIRC, branches cost 2 cycles if not taken, 3 if taken, and 4 if taken across a page boundary.

That is only true for the 6502/65C02.  A short branch taken with the 65C816 in native mode requires three clocks, even when a page boundary is crossed.  In emulation mode, the 816’s branch behavior is the same as that of the 65C02.

BTW, the 65C816 always takes four clocks on a long branch, regardless of operating mode.  Fetching the MSB of the operand accounts for the extra clock.