Min Typ Max

[richardc64]

How can we make a reasonable estimation of what the actual propagation delay could be between two devices when one or both data sheets for those devices omit one or more of those specs?

Data sheets for the 74xxxx family define prop delay as under a load of C and R. A typical value stated for C sub L is 50pf. But if a device's output connects to only one other device input that's less than 1inch distant C won't be anything close to 50pf. Can I safely assume the propagation delay will be something closer to Min than Typ? What if the data sheet doesn't say what Min or Typ could be?

Any thoughts on this question appreciated.

[BigDumbDinosaur]

richardc64 wrote:

Data sheets for the 74xxxx family define prop delay as under a load of C and R. A typical value stated for C sub L is 50pf. But if a device's output connects to only one other device input that's less than 1inch distant C won't be anything close to 50pf. Can I safely assume the propagation delay will be something closer to Min than Typ? What if the data sheet doesn't say what Min or Typ could be?

The likely propagation delay in the scenario you describe will be lower.  However, loading is but one factor in estimating prop delay.  Device temperature and operating voltage are significant factors, plus there are expected process variances from one chip batch to another.

Although I have noted that today’s CMOS logic (especially 74AC and 74AHC) generally outperforms what the data sheet guarantees, I never assume that will be the case.  If your design is banking on a device’s minimum specified prop delay being consistently achieved, it’s only a matter of time before a combination of parts will not work as expected.  If you can tolerate an occasional failure, that’s fine.  If not, you should design using the worst-case timing, unless you are prepared to use a logic analyzer on each chip to see how well it performs with all combinations of input, output loading, and variations in temperature and VCC.

[barrym95838]

richardc64 wrote:

Can I safely assume the propagation delay will be something closer to Min than Typ? What if the data sheet doesn't say what Min or Typ could be?

Any thoughts on this question appreciated.

I'm not a hardware guy, but maybe my thoughts have a tiny amount of value here. The key word for me in your post is "safely". Are you putting together a hobby project on your desk or building a control system for a plane or automobile? There's a wide spectrum of consequences and potential liabilities, and it's up to you and possibly your team of lawyers to decide the risk vs. reward of designing a circuit near the margins.

[GARTHWILSON]

Two others made good posts while I was looking things up and writing, but I'll add this anyway:

...and to make things even more difficult, 74HCxx datasheets sometimes specify the times at 2.0, 4.5V, and 6.0V, not 5.0V where we usually use the device.  However, even with no load at all, it won't get any faster than the internals can go.  An 18-page applications note in the front of my old National FACT data book which I'm glad I held onto (FACT stands for Fairchild Advanced CMOS Technology) which is for 74AC, 74ACT, 74ACQ (the Q stands for "quiet"), and 74FCT, has a short section on the effects of capacitive loading on propagation delays, and has a table, the gist of which is that at 5V, the delay increases about 20ps per pF of additional load.  So for example the 74AC00 has typical PD's of 6.0ns for tPLH and 4.5ns for tPHL @ 5V, 25°C, and 50pF load, and even if you were to totally remove the load, 50pF*20ps/pF won't trim off any more than about 1ns from the total delay.

The manufacturer of your IC should have ap. notes online telling the information you're looking for.  They don't put them in the datasheets, as that would explode the size of the data sheets, and there's no point in that because the information would be the same for all the devices in the family.

[richardc64]

Thanks all.

My concerns are definitely about a hobby project. Ive been going by the Typical prop values given, and for chips where that value isn't given I've been guesstimating delay would be something between Min and Max, and wondering if I've been being overly cautious. System will run at less than 4MHz.

[BigDumbDinosaur]

richardc64 wrote:

My concerns are definitely about a hobby project. Ive been going by the Typical prop values given, and for chips where that value isn't given I've been guesstimating delay would be something between Min and Max, and wondering if I've been being overly cautious. System will run at less than 4MHz.

We’ve often said you can get away with murder at 1 MHz, although that would relate more to the physical layout than anything else.  Nowadays, 4 MHz is like the 1 MHz of 30 years ago and is easy with 74HC logic, the slowest logic family I would recommend in a modern build.  I attained 20 MHz in POC V1.2 using 74AC logic, and all of it in PDIP packages—the board layout was not all that compact.

Typical prop delay values are just that: a statistical mean and, to me at least, of dubious value in working out a circuit’s timing.  In an application where unfailing reliability under all reasonable conditions of temperature and voltage is the goal, you work out timing using the maximum prop delay figures, knowing that those numbers are guaranteed.  For hobby purposes, go with the minimums, knowing that a particular combination of parts might not perform under all conditions.  And, as Garth noted, circuit loading, unless severe, is not likely to skew your numbers enough to cause trouble, unless you are right on the ragged edge of timing to begin with.

barrym95838 wrote:

Are you putting together a hobby project on your desk or building a control system for a plane or automobile?

That’s basically it.  The application dictates how meticulous you need to be in the design and fabrication.  If your gadget is intended to give you something to play with, don’t obsess over timing and possible failures.