Let's start at the very beginning...

[BigDumbDinosaur]

DRG wrote:

BigDumbDinosaur wrote:

I will say that your active-low output pin assignments, e.g., /OE, should be declared active-low and controlled with positive logic equations, which is opposite of what you are doing. 

Argh!! Yes, you did point this out earlier in this thread. So they should be more like this...

The following might be better... 

Code: Select all

/*
 * Outputs:
 */

Pin 23 = !WE;         /* to RAM and ROM chips */
Pin 22 = !OE;         /* to RAM and ROM chips */
Pin 21 = !RAM_CS;     /* to RAM /CS pin */
Pin 20 = !ROM_CS;     /* to ROM /CS pin */
Pin 19 = !IO_0_CS;    /* to IO_0 /CS pin */
Pin 18 = !IO_1_CS;    /* to IO_1 /CS pin */
Pin 17 = !IO_2_CS;    /* to IO_2 /CS pin */
Pin 16 = !IO_3_CS;    /* to IO_3 /CS pin */
Pin 15 = !IO_4_CS;    /* to IO_4 /CS pin */
Pin 14 = !IO_5_CS;    /* to IO_5 /CS pin */

/*
 * Local variables
 */

FIELD Address = [A15..A7];

/*
 * Logic:
 */

WE       = CLK & !RW;
OE       = CLK & RW;
RAM_CS   = Address:[0xxx..BCxx];
ROM_CS   = Address:[Cxxx..Fxxx] & RW;
IO_0_CS  = Address:[BD0x..BD7x];
IO_1_CS  = Address:[BD8x..BDFx];
IO_2_CS  = Address:[BE0x..BE7x];
IO_3_CS  = Address:[BE8x..BEFx];
IO_4_CS  = Address:[BF0x..BF7x];
IO_5_CS  = Address:[BF8x..BFFx];

Note what I said about using POSITIVE logic.  The idea is you negate the pins that are active-low and write positive logic statements to control them.  What you were doing was negating the pins AND the logic.  The result is none of your statements would have produced the desired outputs for the anticipated conditions.