Vector Pull Rewrite for W65C816

[AlanCanon]

Here's a circuit that adds six more IRQ vectors to the W65C816, for a total of seven, triggered by hardware priority.

The circuit detects when the IRQ vector $FFEE-FFEF is being pulled using a 3-to-8 encoder to detect when E and VPB are low, indicating that an interrupt vector is being fetched in native mode. Additionally A4 must be low (excluding the fetch of the RESET vector at $FFFC-$FFFD), and A3-A1 must all be high (excluding the fetch of the COP, BRK, ABORT, and NMI vectors).

Seven active low hardware IRQ inputs are provided, numbered 0 to 6, with the lower number taking the higher priority. A priority encoder encodes the winning IRQ number, and it is added to bits A1-A3 (with potential carry to A4) by a 4-bit adder. This effectively adds an offset of $00, $02, $04, $06, $08, $0A or $0C, to the vector pull, resulting in a fetch of one of the following seven potential IRQ vectors.

An IRQ output, active low, is provided whenever one of the seven hardware interrupts is asserted.

Code: Select all

$FFEE IRQ 0 
$FFF0 IRQ 1 
$FFF2 IRQ 2 
$FFF4 IRQ 3 
$FFF6 IRQ 4 
$FFF8 IRQ 5 
$FFFA IRQ 6 

[GARTHWILSON]

Here it is in black-on-white, for our colorblind members, particularly since one of them can't see green lines, especially against a yellow background:

[BigDumbDinosaur]

GARTHWILSON wrote:

Here it is in black-on-white, for our colorblind members, particularly since one of them can't see green lines, especially against a yellow background:

vpb.gif

Thanks!

[BigDumbDinosaur]

AlanCanon wrote:

Here's a circuit that adds six more IRQ vectors to the W65C816, for a total of seven, triggered by hardware priority...

Have you tested this design? The use of the 1N4148 (D1) in the IRQ circuit may be problematic, since its forward drop will be in the range of 0.7 to 0.8 volts.  The GS output of U2 might not be able to sink /IRQ to where the MPU will recognize that its IRQB has been asserted.  A better choice for D1 would be a small-signal Schottky, which will have a forward drop around 0.4 volts.

Where do the AA net symbols terminate?

I would not use 74LS parts, as their inputs load the circuits that drive them, and because VOH is only guaranteed to be 2.4 volts, well below CMOS territory.

Lastly, the 10K pullup resistor on the /IRQ line is too high, in my opinion. A better choice would be 3.3K, making the circuit less noise-sensitive, and also reducing the possibility of a spurious IRQ occurring due to the R-C time-constant of the /IRQ circuit.

[AlanCanon]

Thanks for the feedback, everyone.

Sorry for posting it in color, I'll be more respectful and post only black and white from now on.

Here's the same circuit with suggested changes HC family logic, and a 0.45 Vf Schottky diode and 3.3K resistor for the IRQ pull.

I've added notations showing that the outputs AA1-AA4 are the rewritten address lines A1-A4, and are to be passed onto the bus as such.

I haven't tested the circuit, just wondered if the idea might provoke discussion.

Particularly, I wonder whether having separate hardware interrupt vectors in this way even would be a useful thing on a 65816 based computer. It would shorten IRQ handling, by acting as a dispatcher to the correct handler (well, up to 7 of them anyway) as soon as the IRQ occurs, rather than having a generalized IRQ handler that checks every possible IRQ source in turn.

One other thing to note is that since the IRQ vector for Emulation mode (6502 mode) could also be rewritten using a similar circuit: here the rewritten vector table might be

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Emulation Mode Interrupt Vector Table (with IRQ0-6)

$FFE0 BRK/IRQ 1
$FFE2 BRK/IRQ 2
$FFE4 BRK/IRQ 3
$FFE6 BRK/IRQ 4
$FFE8 BRK/IRQ 5
$FFEA BRK/IRQ 6
...
$FFFA NMI
$FFFC RESB
$FFFE BRK/IRQ 0

[AlanCanon]

Here's an omnibus version that can do vector pull rewrite for either a W65C02, or a W65C816 in either native or W65C02 emulation modes.

I added a buffer with three state outputs, to keep the offset at $0 when there's no active input coming from any of the 7 hardware IRQ lines.