Apologies in advance if my question is too basic, I tried searching for the answer elsewhere but couldn't find it.
So I am trying to emulate a 6502 like processor, and currently I am just trying to write a very basic blueprint code for the project. As part of it I have written an 8 bit register, but what are the values of the specific values with which I should initialize it?
I guessed from few questions on stack overflow that all flag bits except the interrupt flag and the unused 5th bit is initialized as 0. Is my understanding correct?
What are the initial values of the flag bits?
Re: What are the initial values of the flag bits?
The flag bits are mostly NOT initialised on reset. The exceptions are that interrupts start out masked (because Reset is treated as a special kind of interrupt, and all interrupts mask further interrupts), and on CMOS versions the D flag is also cleared - but on NMOS the D flag is NOT initialised. NZCV flags could be in any random state, but this mostly doesn't matter because they will quickly be set by ALU instructions during the boot sequence. By the same token, the stack pointer is not initialised by reset. Thus, most reset handling code running on the 6502 starts by clearing the D flag and loading $FF into the stack pointer.
So far as a simulator is concerned, you could load a fixed value into both the stack and status registers, and software that runs on a real 6502 will then work in your simulator. The only real difficulty you might then encounter is that software you write and test on your simulator might not behave precisely the same way when you subsequently try it on real hardware. To deal with the latter, you could actively randomise the values and bits that are not specifically initialised.
So far as a simulator is concerned, you could load a fixed value into both the stack and status registers, and software that runs on a real 6502 will then work in your simulator. The only real difficulty you might then encounter is that software you write and test on your simulator might not behave precisely the same way when you subsequently try it on real hardware. To deal with the latter, you could actively randomise the values and bits that are not specifically initialised.
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Re: What are the initial values of the flag bits?
Also, note that the b bit in SR (status register) will be set following reset. The only time your simulator should manipulate b is in response to a BRK instruction and that manipulation should be to the stack copy of SR, not the register itself. A PHP - PLA sequence will always have b set when tested.
x86? We ain't got no x86. We don't NEED no stinking x86!
Re: What are the initial values of the flag bits?
More precisely:
The B bit in the status register does not actually exist, and always appears to be set when pushed using PHP. It is not affected by any value loaded using PLP or RTI. The same goes for the unnamed bit next to it. The status register really has only 6 bits in it, and only one or two of these bits (depending on the CPU version) are initialised on Reset (or during any other interrupt).
The status register value pushed to the stack during a hardware interrupt has the B bit artificially cleared, to distinguish these events from BRK instructions from the point of view of the interrupt service routine. That's the only reason it has a name. (On the '816 in Native mode, there is a separate vector for a BRK handling routine, and the two status bits unimplemented on the 6502 are given a definite purpose.)
Incidentally, the Reset "interrupt" is the only one for which the writes of the status register and the PC to the stack are suppressed. The bus cycles in which these would occur still happen, but are dummy reads instead. You probably don't need to worry about that in a simulator.
The B bit in the status register does not actually exist, and always appears to be set when pushed using PHP. It is not affected by any value loaded using PLP or RTI. The same goes for the unnamed bit next to it. The status register really has only 6 bits in it, and only one or two of these bits (depending on the CPU version) are initialised on Reset (or during any other interrupt).
The status register value pushed to the stack during a hardware interrupt has the B bit artificially cleared, to distinguish these events from BRK instructions from the point of view of the interrupt service routine. That's the only reason it has a name. (On the '816 in Native mode, there is a separate vector for a BRK handling routine, and the two status bits unimplemented on the 6502 are given a definite purpose.)
Incidentally, the Reset "interrupt" is the only one for which the writes of the status register and the PC to the stack are suppressed. The bus cycles in which these would occur still happen, but are dummy reads instead. You probably don't need to worry about that in a simulator.