MOS 8568/8568

[DonnaD]

Does anyone know if there is a datasheet for the MOS 8563/8568 used in the 128 for 80-column mode?

I've searched on the net, and can't find it. I'm just wondering about pinouts etc.

[kc5tja]

I did a search for it myself; I'm not able to find anything. Sorry.

[jdeboy]

You can find some information at

http://www.geocities.com/rmelick/csg.txt

[fachat]

The 8563 seems to be a direct descendant of the 6545/6845 CRTC. You can find some info on those here:
http://www.6502.org/users/andre/hwinfo/crtc/index.html
In the "diffs" section is that the first 20 registers are the same as the CRTC.

André

DonnaD wrote:

Does anyone know if there is a datasheet for the MOS 8563/8568 used in the 128 for 80-column mode?

I've searched on the net, and can't find it. I'm just wondering about pinouts etc.

[kc5tja]

fachat wrote:

The 8563 seems to be a direct descendant of the 6545/6845 CRTC. You can find some info on those here:

I remember reading register descriptions for the 8563 years ago; I don't believe they're compatible chips. I think, by "descendent," Commodore might have meant, "We took the major logic cells from the 6545 and re-used them in the 8563." I don't think that they're register compatible at all, however.

This is, of course, assuming my memory is correct.

[fachat]

IIRC I wrote that as I compared the C128 VDC register description with the CRTC register settings. The first 20 registers look very similar if not identical (except for mode register R8).

Of course they are not compatible. CRTC has no color handling for example. But the memory address generation of the VDC is very similar to the Rockwell 6545 in its "Transparent Adressing" Mode, where the CPU writes the address it wants to access in the video memory to the CRTC and the CRTC then controls the video RAM address lines for the CPU data transfer. The mode is explained in http://www.6502.org/users/andre/hwinfo/crtc/diffs.html

As you say, Commodore might well have taken most of the CRTC logic blocks and added the color handling to it to create the VDC.

André

kc5tja wrote:

fachat wrote:

The 8563 seems to be a direct descendant of the 6545/6845 CRTC. You can find some info on those here:

I remember reading register descriptions for the 8563 years ago; I don't believe they're compatible chips. I think, by "descendent," Commodore might have meant, "We took the major logic cells from the 6545 and re-used them in the 8563." I don't think that they're register compatible at all, however.

This is, of course, assuming my memory is correct.

[fachat]

The csg.txt link above is now obsolete, but you can get a copy at the wayback machine: https://web.archive.org/web/20091028092 ... ck/csg.txt

[fachat]

Unfortunately it does not really give many insights into the workings of that chip, I wonder if there is any other datasheet available now?

[BigDumbDinosaur]

fachat wrote:

Unfortunately it does not really give many insights into the workings of that chip, I wonder if there is any other datasheet available now?

Back in the days when I did professional development on the C-128DCR, I requested a data sheet for the 8568 several times from Commodore (specifically, Fred Bowen).  I was told the 8568 had been developed for internal use only and the data sheet was not for publication.

There’s some info about the 8568 in the C-128 repair manual (attached, see page 41), but not enough to constitute a data sheet.

[fachat]

BigDumbDinosaur wrote:

fachat wrote:

Unfortunately it does not really give many insights into the workings of that chip, I wonder if there is any other datasheet available now?

Back in the days when I did professional development on the C-128DCR, I requested a data sheet for the 8568 several times from Commodore (specifically, Fred Bowen).  I was told the 8568 had been developed for internal use only and the data sheet was not for publication.

There’s some info about the 8568 in the C-128 repair manual (attached, see page 41), but not enough to constitute a data sheet.

Thanks! Actually I have also been pointed to the C128 programmers reference, which seems to contain also a lot of information about the VDC: https://www.pagetable.com/docs/Commodor ... 0Guide.pdf

[richardc64]

Compute's Mapping the Commodore 128 has entire chapters describing the I/O ICs' registers. Here's two sources:

https://archive.org/details/Compute_s_M ... modore_128
https://commodore.software/downloads/do ... modore-128

[richardc64]

Note there are significant differences in the pinouts of the 8563 used in the early "flat" 128 and 8568 in the later Cost Reduced 128DCR.

There might be others besides the pins I've hi-lighted.

[BigDumbDinosaur]

fachat wrote:

Thanks! Actually I have also been pointed to the C128 programmers reference, which seems to contain also a lot of information about the VDC...

Strangely, the programmers’ reference fails to mention that one can avail oneself of the C-128’s screen editor ROM functions for reading and writing the VDC.

That said, in my 80 Column Display Manager (80CDM, source code attached) C-128 utility, I had to control the display to the VDC with a “roll-your-own” driver. This was necessitated by the fact that 80CDM runs in RAM0 under the kernel ROM and that some 80CDM functions need unobstructed access to RAM in the screen kernel range ($0C000-$0CFFF). So I couldn’t use the screen kernel driver.

80CDM can generate a status line at the bottom of the 80-column display by manipulating some registers in the VDC to display a 26th row. That row can’t be written via normal means—you can’t PRINT to it, but is writable by talking directly to the VDC through an 80CDM API.

In order to make it all work, some registers in the VDC are changed to alter its notion of where attribute RAM begins. Doing so opens up the extra space needed for the 26th row. This change also means some “kernal” variables related to the 80 column display must be rejiggered to reflect the VDC register changes.

The VDC has a lot of flexibility, although it is hobbled to some extent by the fact that the block copy/fill feature is limited to 256 bytes per copy or fill. I recall Bil Herd chewed out the VDC’s designer over that stupid limitation. Had the copy/fill count register been 16 bits, a full screen scroll or clear could have been accomplished with very little code and would have occurred many times faster than it does.

The 8568 has an IRQ output that goes low when bit 7 in the status register is set. As the 8568 was originally intended for use in the CBM 900 UNIX workstation, that IRQ output made sense—console video could be interrupt-driven, producing some performance improvement. It’s unconnected in the C-128D (the 8563 doesn’t have an IRQ output) and even if it were connected, it would be of very limited usefulness, given that the C-128 is a uni-tasking machine.

80cdm.asm

C-128 80 Column Display Manager

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