"Arduino Nano-Sized" Logic Chip..ette?

[cdcarter]

While still waiting on some parts for my 6502/z50 Bus project, I've been playing around with a 65816 project on a breadboard. I've been trying out the Arduino Nano and the Raspberry Pi Pico as some sort of system control chip, handling clock/reset/perhaps even decoding with the Pi Pico's flexible programmable pins.

But that's not the point of this thread! While I have been building up this little computer, I got a little obsessed with the TI Little Logic Guide. Folks on this board, Garth and Jeff I believe, have both shared information about the 1G/2G/3G series of very very small and very fast gates. These things are very cool, and there's even some very interesting configurable multi-function gates that can really get the exact series of gates you need.

I envision a breadboard friendly (and here's where I have no clue what to call this thingy) small board, about the size/shape of an Arduino Nano or Raspberry Pi Pico, but with no microcontroller on board. There's still a USB (C?) connector on the edge of the board, providing a regulated power supply, and somewhere between 30-40 pins as soldered through-hole pins. In place of the micro and its flash, we've got surface mount resistors and caps, LVC family 1G/2G logic chips, and cram in all the support circuitry for a fully featured 65xx computer.

That means pull-ups for the input pins on the 02, some basic address decoding, a reset circuit, and maybe even a clock (if surface mount oscillator cans exist at a small enough size). Bonus points for a power LED and pushbutton for RESET. This stuff can all be surface mount and take up a pretty small footprint.

The most basic "edition" could just be Garth's circuit from the primer. An LVC2G00 and and LVC1G00 for /ROMSEL, /RAMSEL, /IOSEL. Pullup on NMI and RDY. The RC net, a pushbutton, and an LVC1G14 (inverting Schmitt trigger) for the Reset circuit.

A more complicated "edition" could add an LVC1G139 for more exact IO Decodes.

An LVC1G29 2 of 3 Decoder/Demultiplexer is a particularly appealing chip, which can carve A14/A15 into 1 32k block, and 2 16k blocks, great for RAM/ROM/IO. Throw in an LVC1G139 for RD/WR qualified by PHI2 and you've got a near complete system.

With the advent of easy surface mount assembly from houses like JLC, fabricating this open design board can be accessible (for the cost of manufacturing) to a hobbyist of any skill level. If a design gets popular, making it available on Tindie or elsewhere is easy.

There are a few bits I have yet to figure out:
[*] Need 3.3v as a supply for the LVC gates. certainly other boards (the Pico) convert the USB 5V to 3.3, just need to make room in the board and BOM
[*] I'm much newer to the world of surface mount components and need to learn my way around picking parts (and ones that JLC has and will assemble for me if possible)
[*] How to get a nice between 1-8MHz clock on there as small as possible.

Anyway, what do folks think of this idea? A little dev-board that's breadboard friendly, very compact, and can provide the basic design for a working computer. From there, a user can easily disconnect a signal from the dev-board and route it somewhere else or generate it themselves.

EDIT:
I particularly like the approach because it "feels" like a single-chip option without needing a GAL programmer.

There's also a neat '816 option where you can latch just one or two bank bits with just a few LVC1G373s. (Which also can straight up provide an IOSEL).

I'll work on a schematic for my favorite option soon.

[GARTHWILSON]

cdcarter wrote:

A more complicated "edition" could add an LVC1G139 for more exact IO Decodes.

That should read, "more fine-grained," as what I show in the basic whole-computer schematic is good for up to ten I/O ICs without any additional logic, and with 32KB of ROM and 16KB of RAM.

Quote:

There are a few bits I have yet to figure out:

• Need 3.3v as a supply for the LVC gates. certainly other boards (the Pico) convert the USB 5V to 3.3, just need to make room in the board and BOM

You don't need that.  Most 74LVC1G__ gates can run on 5V.  They're not just 5V-tolerant; they can actually run on a 5V power supply and put out 5V for a logic-high.

Quote:

• How to get a nice between 1-8MHz clock on there as small as possible.

I got a board made that's very close to what you're talking about, for my '816 project which got put on hold because of work (which goes in waves) and other projects.  It's about the size of a postage stamp, and has a 2x10 pin header to plug into the motherboard, a half-can oscillator, and 13 tiny ICs, including 11  LVC1G ones.  The oscillator can will be socketed, and the edge of the can will go above the edges of some of the ICs, like eves of a roof.  I used the largest packages the LVC1G's come in, and yet I wonder if I'll be able to assemble them by hand!  I have a bag of them here.

Quote:

I particularly like the approach because it "feels" like a single-chip option without needing a GAL programmer.

That was exactly my idea in doing it.  With LVC1G's running at 5V, it will also be faster than most programmable logic.

[plasmo]

You can also build a 6502 computer without glue logic. It needs oscillator, few pull up resistors, and 2 reset supervisors.
viewtopic.php?f=4&t=6455
https://www.retrobrewcomputers.org/doku ... 6502r1home
Bill

[Dr Jefyll]

cdcarter wrote:

I envision a breadboard friendly (and here's where I have no clue what to call this thingy) small board

Ha! Some folks might refer to it as a whatchamacallit, but I find the term "thingy" perfectly apt.

I agree there's scope for some solutions, but we need to think carefully about which problem(s) it is we're trying to solve. Things like the clock circuit and regulated power supply can be "one size fits all" circuits and thus are eligible for the Thingy approach, but address decoding and other sections have a lesser chance of being satisfied. Also, it's not always a win to site stuff on the Thingy just because you can. For example, if you use a SIP array then pullup resistors won't occupy much space on the SBC, and if you relocate them to the Thingy then that small space saving may well be diminished or even negated because you'll need more pins in the connector that connects the main board and the Thingy.

FWIW, I find the 1G Series fairly easy to solder (mainly because there are only 5 or 6 pins, and 4 of them are located on the corner where they're easy to get at). So, for me, soldering is not a problem I'm trying to solve. But rather than using a PCB I often build using point-to-point or wire wrap, and it's somewhat bothersome (though still doable) to mount 1G gates directly on a .1" protoboard. So, I created a custom breakout board specifically for 1G gates. This is an approach I created for my own needs, and I'm certainly not posing it as the best solution for everyone, but it's broadly in the same category as what you're trying to achieve. And the KISS principle applies... I ended up addressing only a very short list of problems.

-- Jeff

ps- more about 1G gates and the breakout board here

[Dr Jefyll]

Just as an afterthought, here's another little PCB of mine. The idea is to be able to assemble a 9-input gate that's still quite fast (<6 ns) despite the cascading. And, by populating it with appropriate 1G components, you can choose the input polarity as being active-high, active low, or a combination (such as 3 active-high and 6 active-low).

Address decoders are one obvious application. And of course the output polarity is also selectable.

Unlike the ICs in the breakout board in my previous post, these don't have all of their IO pins accessible to the outside world. This reduces flexibility but shrinks the footprint substantially. In a 14-pin site there's still room for four gates, dual Gnd & Vcc connections and a pair of bypass caps.

-- Jeff

[Proxy]

If i'm reading the original post right, you basically want to create a circuit in a DIP-40 package (or a "pseudo chip" i guess you could call it) that does something similar to the C64's PLA. more specifically it handles all the decoding logic for RAM/IO, additionally it also has onboard power regulation and a ROM (Flash).
interesting idea, though i'm personally not a fan of having a power connector on a daughter board like that.


but that makes me wonder if you could take the idea further. why stop at only including the ROM and decoding? why not have almost the whole system onboard? like a mini-SBC or pseudo SoC.
though before i start rambling about an idea that dug itself into my mind yet another time, i'm sorry if i slightly derail the thread again... no idea why this keeps happening.

using a DIP-64 package (same as the MC68000) you have enough space to fit a PLCC Flash and a 65C816 and 65C22 (both QFP) on the top side, with almost the entire bottom side being free for SMT logic (which would then be done by PCB manufacturers like JLC). though that means you have to solder the SMT variants of the CPU and VIA yourself.
it would also be possible to use a DIP Flash instead (so you don't need an adapter to program it), but it will take up more space on the front. (also, since the Flash has so much capacity, a VIA pin could be used to Bank parts of it)

anyways, you wouldn't be able to fit a power regulator and connector, and i'm not sure if you could fit a Oscillator on there, but if you can I would make it SMT and place it on the back.
then i'd also recommend choosing something larger and then divide it down since replacing an SMT oscillator is pretty difficult. i'd go with 40MHz for example which then turns into either 20MHz, 10MHz, etc. for the System (depending on some jumper or VIA GPIO with a pull resistor).

and finally, having 64 pins to the rest of the system is enough for all unused VIA pins, the full 24-bit Address bus and 8-bit data bus, RESET, IRQ, NMI, ABT, R/W, 2 clocks (1 directly from the oscillator, 1 from PHI2 of the CPU/VIA), a CS pin for IO, and either 1 or multiple CS pins for RAM. the rest can be power and GNDs.

hmm, it does sound somewhat similar to a W65C265S, just without any RAM, a programmble ROM, potentially faster, and (i think?) more builtin IO.

and rambling done.
i'll put this idea on my long list of potential projects, though i've rarely worked with discrete logic so i'm not sure if i could even fit all that function onto the backside of such a small PCB. (and yes, as part of the concenpt of a pseudo-chip, the PCB shouldn't reach too far beyond it's legs, like a real DIP chip)

[cdcarter]

GARTHWILSON wrote:

Quote:

There are a few bits I have yet to figure out:

• Need 3.3v as a supply for the LVC gates. certainly other boards (the Pico) convert the USB 5V to 3.3, just need to make room in the board and BOM

You don't need that.  Most 74LVC1G__ gates can run on 5V.  They're not just 5V-tolerant; they can actually run on a 5V power supply and put out 5V for a logic-high.

Oh wow, I misunderstood the data book. Or perhaps I was looking at one obscure gate. But a quick spot check shows you're right, all the ones I'm interested in max out at 6.5V. That makes this easier.

Quote:

Quote:

How to get a nice between 1-8MHz clock on there as small as possible.

I got a board made that's very close to what you're talking about, for my '816 project which got put on hold because of work (which goes in waves) and other projects.  It's about the size of a postage stamp, and has a 2x10 pin header to plug into the motherboard, a half-can oscillator, and 13 tiny ICs, including 11  LVC1G ones.  The oscillator can will be socketed, and the edge of the can will go above the edges of some of the ICs, like eves of a roof.  I used the largest packages the LVC1G's come in, and yet I wonder if I'll be able to assemble them by hand!  I have a bag of them here.

Very nice! That's exactly the sort of thing I'm picturing, just in a more DIP-ish format. And indeed, a half-can oscillator is a pretty compact device. It does seem like I could get even more compact with a crystal and SMD caps/resistors, but the half-can is certainly easy.

Your board looks very nicely laid out. Do you have a schematic for it? I'm interested to see what of the LVC1G family you're using. Especially since I have been playing with an '816.

Quote:

I particularly like the approach because it "feels" like a single-chip option without needing a GAL programmer.

That was exactly my idea in doing it.  With LVC1G's running at 5V, it will also be faster than most programmable logic.

Yes, that's the draw for me too!

PROXY wrote:

If i'm reading the original post right, you basically want to create a circuit in a DIP-40 package (or a "pseudo chip" i guess you could call it) that does something similar to the C64's PLA. more specifically it handles all the decoding logic for RAM/IO, additionally it also has onboard power regulation and a ROM (Flash).
interesting idea, though i'm personally not a fan of having a power connector on a daughter board like that.

Yes, "a circuit in a DIP-40 package" is exactly right.
I suggested the power connector on the daughter board because a lot of projects seem to be doing this already with a Nano or a Pico. It's certainly not the most interesting part of the build for me.
+1 on the point that I don't want many (if any) components on the underside.

Dr Jefyll wrote:

I agree there's scope for some solutions, but we need to think carefully about which problem(s) it is we're trying to solve. Things like the clock circuit and regulated power supply can be "one size fits all" circuits and thus are eligible for the Thingy approach, but address decoding and other sections have a lesser chance of being satisfied. Also, it's not always a win to site stuff on the Thingy just because you can. For example, if you use a SIP array then pullup resistors won't occupy much space on the SBC, and if you relocate them to the Thingy then that small space saving may well be diminished or even negated because you'll need more pins in the connector that connects the main board and the Thingy.

Your points about saving SBC space are worth considering, but I see the Thingy as a solution that is breadboard friendly as well. Whether or not pull-up resistors make sense to stick on it, I will have to think about!

Regarding address decoding, I think there's a world for a known good design/address map that can be stamped out. Daryl has his well-documented decoder design for a GAL. I see this as similar. Instead of needing a GAL programmer you need to have surface mount skills or be willing to pay for a third party to assemble. But the design is still a good starting place, it's open source, and maybe I (or someone) could sell a couple.

[richardc64]

GARTHWILSON wrote:

cdcarter wrote:

...There are a few bits I have yet to figure out:

• Need 3.3v as a supply for the LVC gates. certainly other boards (the Pico) convert the USB 5V to 3.3, just need to make room in the board and BOM

You don't need that.  Most 74LVC1G__ gates can run on 5V.  They're not just 5V-tolerant; they can actually run on a 5V power supply and put out 5V for a logic-high.

Awesome! All the 74LVC_ data sheets I've looked at -- the soic ones, not Tiny Logic -- state max Vcc= 6.5V. But the propagation delays listed only include Min and Max up to 3.3V. Would those times be shorter at 5V? Based on the trend from 1.8V to 3.3V, it would seem Max would be shorter at 5V.

[GARTHWILSON]

richardc64 wrote:

GARTHWILSON wrote:

You don't need that.  Most 74LVC1G__ gates can run on 5V.  They're not just 5V-tolerant; they can actually run on a 5V power supply and put out 5V for a logic-high.

Awesome! All the 74LVC_ data sheets I've looked at -- the SOIC ones, not Tiny Logic -- state max Vcc= 6.5V. But the propagation delays listed only include Min and Max up to 3.3V. Would those times be shorter at 5V? Based on the trend from 1.8V to 3.3V, it would seem Max would be shorter at 5V.

The data sheets for the many that I've looked at all have propagation delays for 5V.  There's also a graph showing how Vcc affects propagation delay, like this one from the '02 data sheet: