Serial handshaking is completely optional, as far as I'm aware. If you want to use it, you'll need to tell both ends, or things may not work. If the handshaking connections are in place, but handshaking is not being used, those signals will get ignored.
It looks like you're thinking differently to the way I would, but you might not need two 65SPIs.
The way the slave selects are set up on the 65SPI, they actually work as general purpose outputs; they mirror the bit pattern in the SSR, so you could put a 3-to-8 decoder on them(for example), and get 8 selects out of 3 lines from the chip.
That's actually a really good idea, especially considering that addressing multiple SPI chips at once is not very common (or possible? I forsee contention on the SO line if it's a read in this case). so I guess I can get some extra SPI without the extra SPI chip, which will save board space and make things cheaper and cleaner.
Thanks!
So then, I can forget the extra 65SPI (I'm getting 2 from Garth, I'll save the other for a rainy day), but I am actually looking at
another addition.
Originally, I was going to look into the capability of the 28L92 to generate a square wave clock output on OP3 to use as a jiffy timer, with a very specific frequency. Doing this, I could time the processor's clock on startup like this (psuedo code since I'm not entirely familiar with opcodes yet):
- Set register X to 0
wait for IRQ
set flag in memory (or possibly on the processor's P reg)
RTI
LOOP branch on flag, INCX if flag is set
JMP LOOP
IRQ comes back in, back to ISR, now with a value in X
I can then use the value of X to see how many clock cycles were completed within the given interrupt time (which is a well known clock rate) and know the CPU clock without much trouble, and be able to display it (for grins) and use this info to form "delay" commands that can accurately delay for a set amount of time (only to be used when we can't be doing something else useful)
The documentation for the 28L92 is, to me at least, very dense. I believe I could eventually get it set up correctly to do this and be able to time the processor off of it, and use it as a general purpose "jiffy" interrupt afterward. But I got to thinking, if I put a RTC in the machine, I could have accurate date/time AND this kind of functionality without much extra effort, since most RTCs are set up to do square wave/alarm/interrupts like this already. This would remove the need to rely on a chip like the 28L92 to be able to time the processor clock, and probably be a more resilient solution in case anything ever changes.
The one issue is, it appears most of the THT RTCs that have nice time keeping and battery backup have a multiplexed address/data bus, which could complicate integration into the machine. I've found a total of 1 chip that has parallel busses, but I don't think it keeps time with power off, and I'm not sure what its accuracy is (it seems more like just a timer chip, although I'm not even sure about that, the datasheet on it is absolutely horrible (is Epson bad about data sheets?))
Thoughts anyone?
