Visualizing the 6502
Visualizing the 6502
(Edit: the Visual6502 project website is now up, with a transistor-level simulator and the full presentation as PDF. This thread is open for comments on the findings!)
(Edit: Michael Steil's recent presentation on reverse-engineering the 6502 is now up on YouTube)
There's a quiet little link sitting in an AtariAge postingreferenced from this thread about interrupt timings which leads us to a very interesting presentation at this year's SIGGRAPH: Greg James and Barry and Brian Silverman deprocessed a 6502, analysed the photomicrographs with a heap of GPU power, and produced a working visual simulation of the chip from the layout!
Here's a bit of the PLA: "We encountered only 8 errors in ... over 20,000 components" - and they corrected them as they went.
In the process, they get a full chip netlist. It sounds like a great presentation (but there's not a lot to be found online as yet.)
As it happens, there's another 'Visual 6502' which was presumably written more conventionally.
There's also a 4004 simulation by Lajos Kintli (Windows executable) - see this screenshot:
(Edit: Michael Steil's recent presentation on reverse-engineering the 6502 is now up on YouTube)
There's a quiet little link sitting in an AtariAge postingreferenced from this thread about interrupt timings which leads us to a very interesting presentation at this year's SIGGRAPH: Greg James and Barry and Brian Silverman deprocessed a 6502, analysed the photomicrographs with a heap of GPU power, and produced a working visual simulation of the chip from the layout!
Here's a bit of the PLA: "We encountered only 8 errors in ... over 20,000 components" - and they corrected them as they went.
In the process, they get a full chip netlist. It sounds like a great presentation (but there's not a lot to be found online as yet.)
As it happens, there's another 'Visual 6502' which was presumably written more conventionally.
There's also a 4004 simulation by Lajos Kintli (Windows executable) - see this screenshot:
Last edited by BigEd on Fri Dec 13, 2013 3:46 pm, edited 3 times in total.
Wow! I've been touch with the people who did this, and I'm amazed.
After a long journey which starts with a chip and some sulphuric acid, they've produced a visual simulation of the chip. You can zoom in, single-cycle, probe the circuit for logic levels. It's javascript which means you need a fast browser on a fast machine, and it's a work in progress which means things will only get better. You need a fairly high screen resolution too.
Here's a screenshot looking at a corner of the PLA during simulation: Its running at about 2Hz.
I've asked Mike to put some of the materials up - the PDF of the presentation is well worth going through.
After a long journey which starts with a chip and some sulphuric acid, they've produced a visual simulation of the chip. You can zoom in, single-cycle, probe the circuit for logic levels. It's javascript which means you need a fast browser on a fast machine, and it's a work in progress which means things will only get better. You need a fairly high screen resolution too.
Here's a screenshot looking at a corner of the PLA during simulation: Its running at about 2Hz.
I've asked Mike to put some of the materials up - the PDF of the presentation is well worth going through.
Last edited by BigEd on Fri Dec 13, 2013 3:44 pm, edited 1 time in total.
I'm told by Greg and co that their website is nearing publication: keep an eye on http://visual6502.org/
They are working on other chips of the 8-bit era and will be interested in donations (to be deprocessed destructively) - also donations of the conventional kind.
I'm not aware of another case, but then I'm narrow in my own fanaticism! The material about the 4004 reverse-engineering mentions that it is historically important, complex enough to be interesting but simple enough to be tractable. I think 6502 meets the same conditions, as well as having shipped in some very popular products - a lot of programmers and a lot of users will have fond memories.
The Transputer has its fans too, but was never so widely used. I've seen mention of a couple of efforts to re-make that processor on FPGA.
In the realm of processors before chips, there was some interest and activity around the 50th anniversary of Baby including a programming contest. And of course Babbage's Difference Engine was rebuilt (or built!), as was Colossus.
Quote:
Does anyone know of any other processor architecture that has this kind of educational material (and, for that matter, fanatics)?
The Transputer has its fans too, but was never so widely used. I've seen mention of a couple of efforts to re-make that processor on FPGA.
In the realm of processors before chips, there was some interest and activity around the 50th anniversary of Baby including a programming contest. And of course Babbage's Difference Engine was rebuilt (or built!), as was Colossus.
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ElEctric_EyE
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Re: Visualizing the 6502
BigEd wrote:
... a very interesting presentation at this year's SIGGRAPH: Greg James and Barry and Brian Silverman deprocessed a 6502...
Last edited by ElEctric_EyE on Tue Sep 14, 2010 3:01 am, edited 1 time in total.
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ElEctric_EyE
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- Location: OH, USA
BigEd wrote:
They are working on other chips of the 8-bit era and will be interested in donations (to be deprocessed destructively) - also donations of the conventional kind...
As I understand it, recapturing existing published designs is completely legal - building and selling something derived from that information is where it gets interesting.
Arguably, microcode is a special case, but that doesn't apply here. (Also, jurisdictions differ.)
There are Atari chips in the pipeline, but I'm not sure about ANTIC.
Personally I'll be interested in the 6800, because I'd like to see what similarities and differences exist at the layout and microarchitectural levels.
Arguably, microcode is a special case, but that doesn't apply here. (Also, jurisdictions differ.)
There are Atari chips in the pipeline, but I'm not sure about ANTIC.
Personally I'll be interested in the 6800, because I'd like to see what similarities and differences exist at the layout and microarchitectural levels.
Visualizing a Classic CPU in Action: The 6502
Although the website isn't live yet, I have permission to link to the PDF of Greg's SIGGRAPH presentation - I thoroughly recommend it!
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visual6502
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Hi everyone! I'm happy to say that our site is now live and running our little JavaScript simulator: www.visual6502.org
This is just the beginning, and we're really excited about what all this might lead to. Look forward to more tools, simulations, chips, and ways to get involved. Check our FAQ and slides for more info. Enjoy!
- Greg, Barry, Brian, and Ed
This is just the beginning, and we're really excited about what all this might lead to. Look forward to more tools, simulations, chips, and ways to get involved. Check our FAQ and slides for more info. Enjoy!
- Greg, Barry, Brian, and Ed
visual6502 wrote:
Hi everyone! I'm happy to say that our site is now live and running our little JavaScript simulator: www.visual6502.org
This is just the beginning, and we're really excited about what all this might lead to. Look forward to more tools, simulations, chips, and ways to get involved. Check our FAQ and slides for more info. Enjoy!
- Greg, Barry, Brian, and Ed
This is just the beginning, and we're really excited about what all this might lead to. Look forward to more tools, simulations, chips, and ways to get involved. Check our FAQ and slides for more info. Enjoy!
- Greg, Barry, Brian, and Ed
I envy you for the experience doing this work, learning about this little ingenious chip's inside!
And I second that I want the 6522 as next chip :-)
to find out about that crazy shift register bug
André
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nichtsnutz
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Hello all,
this is an amazing work you have done! Thank you so much! Now it is possible for someone who has the skills to write a HDL model of the 6502 that is not only bus cycle exact but also register exact!
I would also like to point you to another project of Mr. Curt Vendel of atariAge:
http://www.atariage.com/forums/topic/15 ... 5cbf79fbc5
He has resynthesized the MARIA chip of the ATARI7800! So the physical level is already there and could be feed to your simulator.I think this would be easy to do for you.Unfortunately Mr.Curt has not made the netlist publicy available.But maybe you could contact him for details!?
I am unfortunately not so skilled to do something like this,I am trying single stepping into an T65 VHDL core from Daniel Wallner.
Greetings,
Vassilis
this is an amazing work you have done! Thank you so much! Now it is possible for someone who has the skills to write a HDL model of the 6502 that is not only bus cycle exact but also register exact!
I would also like to point you to another project of Mr. Curt Vendel of atariAge:
http://www.atariage.com/forums/topic/15 ... 5cbf79fbc5
He has resynthesized the MARIA chip of the ATARI7800! So the physical level is already there and could be feed to your simulator.I think this would be easy to do for you.Unfortunately Mr.Curt has not made the netlist publicy available.But maybe you could contact him for details!?
I am unfortunately not so skilled to do something like this,I am trying single stepping into an T65 VHDL core from Daniel Wallner.
Greetings,
Vassilis