All --

I'm running out of v2.7 boards so I was thinking of doing a re-spin of the board, reducing the size a bit (to try to cram it into ECB size (160mm x 100mm). I've come to like that size from some other projects I did for the Retrobrew group.

If I do this, are there any changes I should make? There's a lot on the board, but I think I can get it into the ECB size. I thought about adding a SID socket but real SIDs are hard to find and the SwinSID, which I have, I never got to work successfully on a breadboard. Not sure why.

Anything else I should think about? Maybe changing the miniUSB power jack to a USB-serial adapter which then connects to the ACIA. That eliminates a MAX232 and caps. Need to watch the power consumption, though. One of the S100Computers boards uses this setup.

Rich

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Rich Cini
Build Master and maintainer of the Altair32 Emulation project
http://cini.classiccmp.org
http://altair32.classiccmp.org

Rich, a USB connection might useful for some people, but a pure TTL serial header that bypasses the MAX232 might be more useful. The reason is that you could connect it to something like a Pololu Wixel or other wireless serial link.

Yup. The 2.7(A) version has a TTL header.

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Rich Cini
Build Master and maintainer of the Altair32 Emulation project
http://cini.classiccmp.org
http://altair32.classiccmp.org

Well, I've not looked at the board itself since you provide no (obvious) links to it, but...


Changing your Mini-B receptacle to a Micro-B receptacle would probably be a good idea. Not only has the Mini-B been deprecated since 2007 (Micro-B cables are significantly easier to find), but Micro-B has twice the minimum number of insertion/removal cycles (increased from 5,000 to 10,000).


I think that's a pretty good idea; I don't use RS-232 levels on any serial interfaces any more except old computers that don't do TTL serial.

As Martin_H points out it's also a good idea to keep your serial header on the board, allowing the board to be powered from USB but do serial through a separate link. You would probably want a jumper to disable the USB/serial chip in case someone is powering it from a host device using a cable with data lines but wants to use the header for serial.

If your serial header doesn't already include +5 V, adding that would allow you to have a separate MAX232 board to plug in to the header for applications that need RS-232.

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Curt J. Sampson - github.com/0cjs

I would also suggest using a FTDI USB-to-Serial adapter and remove the MAX232, it will save some board space. Also, if the intent is to use the 6551 as a console, I would likely remove the configuration jumpers and simply wire up the FTDI adapter as a 5-wire interface (Gnd, TxD, RxD, RTS, CTS).

Second, in the case where you may not be able to get an older 6551, possibly add a 1M resistor in parallel with the 1.8432 MHz crystal.... as the latest WDC part (w/Xmit bug) will not oscillate without the 1M resistor.

Third, if you use some open-frame IC sockets, you can easily hide the bypass capacitors under the ICs and the can oscillators. I did this on my last SBC and it's a nice way to free up some space.

Last, you could replace the 74LS00, 74LS30 and 74LS138 with a single ATF22V10 PLD, which would make the memory map flexible as well... but then again, that's a part that needs to be programmed and has a higher current draw than what it replaces.

Note: link to the PCB is here: http://www.classiccmp.org/cini/images/6502spc_v27.jpg

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Regards, KM
https://github.com/floobydust

Late to the party but I have a question as to whether anyone has tried or if it is feasible to up the clock speed for the 6502c and components. Is the 6551 the limiting factor or is it the glue logic? Seems like 6502c and 6522c should be capable and the eerom and ram could be chosen in fast enough versions to do this. As a hardware novice I would appreciate any reasons for or against.
Thanks

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http://WilsonMinesCo.com/ lots of 6502 resources
The "second front page" is http://wilsonminesco.com/links.html .
What's an additional VIA among friends, anyhow?

Thanks for the reply I was thinking of relatively modest increases in clock speed say up to 7 Mhz but I'd be content with 4 Mhz. Sorry to be imprecise in my naming of the components I did mean 65c02 and 65c22 and I was thinking particularly of the SBC 2.71 board. I do have a CRC65 from plasmo (Bill Shen) and have not pushed it past the 14 Mhz it came as, and I am very happy with it. I guess there is nothing left but to give it a try and see where it breaks. I ought have studied the timing requirements of the various bits before asking but I suppose it also depends on the board design as well as the specific components and their possible faster relations.
I'll report any success and failure as I proceed.

BillO is the proud owner of a few old 'c51s that are alleged to run cleanly @ 20 MHz.

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Got a kilobyte lying fallow in your 65xx's memory map? Sprinkle some VTL02C on it and see how it grows on you!

Mike B. (about me) (learning how to github)

okwatts,

Your CRC65 should be able to run to 29.5MHz, but the bottleneck is the access time of the no-brand CF disk; it is not fast enough to boot at 29.5MHz. You may want to try more recent brands of CF disks that may be fast enough to run with 29.5MHz W65C02. Alternatively, you can use serial boot mode to load programs and run without CF disk. Be sure to raise serial baud to 230400.
Bill

Just an update to say my replacement of the 1 MHz oscillator with a 4 MHz one seems to be working albeit this is not with Rich's ROM. I reprogrammed the ROM using code from user dourish to allow trying out his version of forth called SECND with a bit-banged SPI SD card interface. All seems good at the moment although my EEPROM is a 150ns access time one and the SRAM is 70 ns. I am using a 80's vintage Rockwell 6551AP ACIA as the more recent version I ordered from Jameco did not work. I could see data going in but nothing was emerging. Possibly DOA but it could be not oscillating. It is not the 65C51 version so I'm not sure if there is some other reason. At some point I will have to investigate further. So at the moment the SBC2.7 is being repurposed to be a MITE computer and I am exploring Paul's forth and SD card interface.

Just an update that, it appears that I had a subtle issue that only showed up in relation to another topic (viewtopic.php?f=12&t=7371) and also the discussion on GPascal (viewtopic.php?f=1&t=7045). I needed to change the logic for the 74LS00 74LS30 and 74LS138 to 74HC to get more reliable operation(EDIT see below). I haven't got to the bottom of this yet, possibly one of the 74LS was flaky (likely the 00 as it qualifies the read/write). In any event the 74HC logic gates seem to work better for me. I also would caution about the specific RAM chips used as per the thread from adrianhudson.

EDIT: It appears that this is maybe just due to a flakey 74LS00, I only had one and used it. I reverted to the 74LS and then replaced the 74LS00 with an old 74H00 which seemed to work reliably. I'm still investigating the RAM chip situation.