As was already mentioned, Atlantis...

Yup.

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In 1988 my 65C02 got six new registers and 44 new full-speed instructions!
https://laughtonelectronics.com/Arcana/ ... mmary.html

That was one in which the logic states under various conditions were highlighted. I used "hard" colors, intense red and green, which I have little trouble distinguishing on a white background. Where the trouble is starts is when "soft" colors are used, or when both a color background and foreground are simultaneously used. Blue in all cases is a significant problem, so I never use it in electrical schematics.

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x86?  We ain't got no x86.  We don't NEED no stinking x86!

Sorry, I missed it.
Schematics and photos of my computer are posted HERE

I do not see any reason why some won't work with it. Of course assuming they are fine and not compromised in some wired way, that allows them to run NOP test with proper result.
Well... Only one thing came to my mind. I designed CPU board in a way that two SRAM chips, EPROM and address decoder are connected directly to the CPU address bus. I assumed it wouldn't be too much of a load (SRAM is CMOS, address decoder is built with HCT chips). I added 74HCT245 buffors just before system bus connector, so all the chips on the second board are buffored.

There are bypass capacitors and electrolytic/tantalum capacitors present on my boards.

Oh yes, that thing. I see it's configurable to run at 1MHz or 2MHz, which is not too ambitious, so the basic PCB design technique shouldn't be a problem. But the clock generator uses 74LS chips in the schematic, which would not be a good fit for a CMOS CPU. And the BE pin is not pulled up, which may disable some of the more advanced 6502 variants; short it to /SO as an expedient. In fact, I would swap out all 74LS logic for 74HCT as an early troubleshooting step.

It LS only on the schematic. I changed it to HTC long time ago, as you can tell by the photos.



Those "mysterious" 6502s running fine with NOP test on breadboard but not working with my computer were tested with standard configuration, without this pin pulled up.

Is is there remote possibility that it can be load issue? Because of 2xSRAM and EPROM connected directly to address bus?

All 6502s have at least as much drive capability as the NMOS ones, which have an LSTTL-like asymmetry in their drive due to the depletion-mode N-type pullup transistor. The CMOS ones can pull up much harder.

But I do see some 74LS chips on your board in the photograph, and those will definitely have inferior drive and load characteristics to 74HCT. I seriously do recommend eliminating them from your build.

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http://WilsonMinesCo.com/ lots of 6502 resources
The "second front page" is http://wilsonminesco.com/links.html .
What's an additional VIA among friends, anyhow?

Conversely, the CMOS CPUs will likely be more sensitive to the voltage levels on input. Generally a CMOS device will prefer to see CMOS-like rail-to-rail inputs, rather than TTL-style inputs which may be a valid high as low as 2.4V. It is of course possible to make a CMOS input that is TTL-compatible - that's what the 74HCT series is all about - but some of the CMOS 6502s don't have this.

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http://WilsonMinesCo.com/ lots of 6502 resources
The "second front page" is http://wilsonminesco.com/links.html .
What's an additional VIA among friends, anyhow?

Whoa, wait... Atlantis, do you mean on your computer that pin is still not pulled up? That would explain a lot!

Not sure what you mean by standard configuration, but all the newer CMOS CPU's do need the pin pulled high. You can't standardize on the old pinout, I'm afraid.

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In 1988 my 65C02 got six new registers and 44 new full-speed instructions!
https://laughtonelectronics.com/Arcana/ ... mmary.html

Currently there are two LS chis on my computer present and neither of them interacts with the CPU during its normal operation. First one is a 74LS373 acting as an output port, so unless activated is seen by the system bus as a high impedance. Second one is 74LS00, which is used to activate this port. It is driven by the address decoding, made with HCT chips. It is not even connected to the R/W and FI2 lines, because there is simple logic generating Intel style RD and WR signals. So all signals driving those LS chips are generated by HCT chips.



This explains nothing at all. My computer was designed with NMOS chips and their CMOS equivalents (like R65C02) in mind. I am aware that WDC65C02 requires pin BE being pulled up.

To be sure we talk about the same thing, let me explain once again:
1) I bought some 6502 CPUs from different sellers on Aliexpress. Those chips supposed to be NMOS or CMOS R65C02. Not WDC version. Most likely they were relabeled anyway...
2) I tested them in my computer and found out that some of them do not work properly. EhBasic doesn't initialize, there is no activity on serial terminal.
3) I performed NOP test on chips that failed previous test (inside computer). I used breadboard and wired it for standard NMOS/R65C02 chips (which they supposed to be), so no BE pin being bulled up. And yes, I used 74HCT74 on my breadboard.
4) Some (six to be precise) of those CPUs passed NOP test on breadboard, however they were unable to work inside my computer. I am trying to figure out why.

It can't be because of lacking pull-up on BE pin, because:
1) They are running NOP test on breadboard, despite the BA pin not being pulled up.
2) There not suppose to be a BA pin anyway. They were bought as NMOS parts.

Consistent with the title thread, if they *do* start working reliably when the BE pin is actively pulled up, then you've identified them as functioning 6502s - but that are not quite the model you expected. It wasn't just Rockwell and WDC making CMOS 6502s, and quite a few of the variants have either a BE or DBE pin.

The thing is, you can't assume that a pin is pulled low just because you didn't pull it high. Especially on CMOS inputs, if you leave it floating it can take on any value and even pick up crosstalk from nearby signals. It would not be at all unusual for it to do something different when put in a different circuit. So I really do think you have a BE pin on these "flaky or non-functioning" CPUs. Testing them with BE tied high will let you figure out which.

Just to note, Atlantis, you are observing that a chip works in a NOP test but does not work in your computer. There's a whole spectrum in between those two extremes - it's not wise to think of a NOP test as a gold standard. It's just the simplest possible test.

If you have any old commercial 6502 computers with a socket for the 6502, and if you are fairly confident that the chip you wish to test is the same pinout as the computer expects, then using that computer as a test is a physically simple thing to do which will put the 6502 through a fairly complex test.

I've seen problems in the past where a 6502 didn't put out a SYNC signal. In almost all applications, that wouldn't matter, but in this case it did. One can imagine that a faulty NMI input would also work in many situations but certainly not all. A faulty RnW output would cause a 6502 to run the NOP test happily but fail to work in pretty much any other application. And so on.

Ok, I tested each one of those six chips in my computer again, after pulling BE pin up. They still won't work...
This is strange...

Can I leave BE 3,3k pull-up resistor there, even if I intend to use NMOS CPU? Will it be safe for NMOS version of 6502?

Yes. Pin 36 is "NC" (not connected) on the NMOS 6502 and Rockwell 65C02. (I have it pulled up on my RC6502 Apple 1 clone, though I'm using an NMOS CPU.)

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Curt J. Sampson - github.com/0cjs