Dr Jefyll wrote:
Awesome job, Frank and Dieter!!
And thanks for the startlingly extensive writeup, Dieter!
Thanks, Jeff. It sure was a lot of work.
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There's more here than I can take in at one sitting. But here are a few questions that come to mind so far.
In
this post you mentioned that, "BRK has one more step than the rest of the instructions: T6." But isn't it true that the total number of cycles for BRK is the same as that for an interrupt?
True.
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BRK is listed as a 7 cycle instruction, and from my point of view it begins with the cycle during which the opcode is fetched. I assume this corresponds to the cycle during which an interrupt sequence begins (by fetching an opcode but discarding it and replacing it internally with $00). Can you clarify, please, regarding "one more step than the rest of the instructions."
We have two sequencers, one generating T0#..T1#, the other generating T2#..T5#, and their outputs go into the PLA.
And we have that T6 flipflop, its output does not go into the PLA.
It goes into some logic gates inside the "random logic area", which also is fed by the PLA outputs.
T6 flipflop _only_ is set when a BRK instruction has finished state T5.
This is done in the PLA by product term "26:T5.INT" (I had not picked that name, them MOS engineers had labeled it like that), which is Visual6502 node 370.
When the interrupt logic kicks in, it forces the instruction register to $00 (that's BRK), and fakes a BRK sequence for the rest of the CPU.
That sequencer thing is a bit tricky: instruction fetch seems to happen during T1, and to me it looks like ALU data operation hypothetically might happen during T0.
But as I already had said: I don't have the ressources for digging any deeper into it. And the next chip already is waiting to be dissected.
Hey, you could write a nice set of technical articles.
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Question 2: I'm interested in the topic of the predecode section. In
this post you mention, "Signal '21.A' is low for instructions which take two cycles, and where the ALU operation could be done in parallel with the next instruction fetch." Since you use the word "and," it sounds as if two separate conditions need to be satisfied. But perhaps what you mean to say is, "Signal '21.A' is low for instructions which take two cycles. These will be instructions where the ALU operation could be done in parallel with the next instruction fetch."
When I'm cutting a piece out of the silicon to be dissected, I give it a number, for instance "21) instruction register".
When spotting signals going into (or out of) that section, and I don't really know what they are good for, I initially give them temporary names like "21.A .. 21.Z".
When I'm (more or less) sure, what they are good for and what they actually do, they get real names like "T11".
Means that I don't know for sure what the signal '21.A' actually causes/does, but I noted/stated my observations.
Some people label a "black sheep" a 'black sheep' when spotting it somewhere far away in the landscape, and usually this might do.
Others label it 'a sheep which appears to be black on at least one side' until they know for sure, what is technically more correct.
It has to be done this way, because else the dissection would be heading for the wrong track at some point when basing everything on assumptions.
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Final question (for now, at least): what does
IDKFA stand for??
When typing in that cheat code, it depends on the game:
In DOOM, it instantly gives you unlimited health, weapons and ammo.
In Mechwarrior2, it instantly punches the ejection seat (plus you) out of the cockpit, while a message is displayed: "This ain't DOOM, bub."
Edit:
Thinking of it... that's a nice analogy:
When making use of the things here in this thread, depending on some factors you might not be aware of
this either puts you into "god mode", or brings you into serious trouble, or isn't useful at all for solving your current technical problem.
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Congrats again on a great job
Again: thanks, Jeff.