A $10 asynchronous VGA interface

[CountChocula]

Hi all—

I was intrigued by Bill's recent posts on CPLDs, and a few weeks ago I came across this developer board based on Altera's Max II. It was so inexpensive—I think I ended up paying $10 CAD shipped for mine—that I figured it wouldn't hurt to try and see what could be done with it, and so I ordered one. It arrived after a few weeks, but I was busy with work, and didn't really get around to trying it until last weekend.

I had no idea to expect (and really no expectations that I would be able to do anything useful with a $2 chip), but I was surprised to find out how much capability can be squeezed out of these devices. In particular, I was surprised by how much more quickly one can prototype a circuit, especially using Verilog. Once you get past the fact that it looks like C but doesn't quite behave like it, it's remarkably easy to build what circuits that would be pretty complex (at least for me) implemented using only discrete logic.

In any case, I started with blinking a LED, and somehow ended up implementing the VGA controller that I've always wanted for my SBC . Here's a final list of features:

• Completely asynchronous operation; you should be able to just bitbang data into the registers at the typical speeds supported by most hobbyist projects.
• 320x240 resolution at 8BPP (RRRGGGBB), rendered as a 640x480 @ 60Hz standard VGA signal.
• 640x240 resolution at 4BPP “high res” mode using a CGA-like palette, capable of 80x30 text (though you will have to implement the text rendering in software).
• Hardware accelerated vertical scrolling (handy for text displays).
• Toggable self-incrementing X coordinate for faster data transfers.
• Active-low interrupt when entering the non-visible area at the bottom of the screen.

I uploaded a demo of it running to YouTube (this is currently powered by a PIC18 running at 64MHz, because I didn't have a working 6502-based SBC handy), and have attached a copy of the schematic below (though, to be honest, it's not that interesting… all you really need is the Max II, 128kiB of RAM, and a handful of passives). Here are some photos from the output, which is rock-solid and flicker-free—and looks much better in person:

I put the entire source up on Github in case this comes in handy to anyone. The Max II is technically obsolete, but easily obtainable from AliExpress, even with all the FPGA/CPLD shortage going on, and it costs a pittance. The design leaves enough resources unused (about 15%, and roughly 20 pins) that it should be possible to use the extra room for glue logic or other applications to reduce the chip count in an SBC design.

To wit, I have ordered some PCBs from JLCPCB; the design ends up being small enough that I was able to splurge on a 4-layer board, so I'm looking forward to seeing how well that works when it gets here. In the meantime, I have built an even-worse-than-usual rats' nest using the development board:

I would love feedback on the design—I'm sure there are plenty of ways to improve it (and probably a few bugs). In particular, I couldn't get the MPU interface to work bidirectionally… if I add functionality to expose data through the bus, the CPLD always ends up picking up a bunch of garbage when a write occurs, even though I wait a full clock cycle for the signals to stabilize. This doesn't matter too much—I don't really need the read functionality at this point, but it nags me that I can't understand what I'm doing wrong, and I suspect that I may one day want to add the ability to send data back to the MPU anyway.

The interface really does all I wanted for my SBC; in particular, I was keen on supporting 80x30 text with good scrolling performance, which I was able to achieve by using a hardware offset, so I think I'm going to stop here and focus on interfacing with my computer instead. In the future, I am keen to add some more fun functionality, like sprites and proper text-mode support, but for that I will most definitely need a more powerful CPLD (possibly with built-in memory, because interfacing with an external chip was not easy). I welcome ideas for more features!

A big thank-you to Bill for piquing my interest with his posts; I also borrowed liberally from this old post by Arlet when coding the memory interface, so big thanks to them and the other on that thread as well.

Cheers,


Marco


PS: If anyone knows of a good looking 8x8 font that I can use, I would be very grateful for a pointer to it. Though I am happy that I was able to find a free one to use, it doesn't look great in either 40- or 80-column mode!

[drogon]

This is the 8x8 font I use:

https://unicorn.drogon.net/systemFont.h.txt

I'm sure it would be easy to mash that into anything you like - the important bit is that the vertical bars are double width where possible which makes it very visible on TVs (not that that's an issue for you, here though - read this for some details: https://retrocomputingforum.com/t/8-bit ... esign/1097)

I'm just getting into the world of FPGAs myself, so this is all very interesting and relevant to me - thanks!

-Gordon

[CountChocula]

drogon wrote:

This is the 8x8 font I use:

Screenshot_2022-04-03_20-09-52.png

I'm just getting into the world of FPGAs myself, so this is all very interesting and relevant to me - thanks!

-Gordon

Thanks, Gordon! Your font looks tons better. Cheers!

[Proxy]

very interesting! 192 Macrocells and it directly supports Verilog without the need for POF2JED like the ATF15xx series does.
though it doesn't appear to be sold anymore (atleast on mouser) and other sites like UTsource it costs between 4 and 6 EUR/USD per IC.
another downside is that it only runs at 3.3V maximum, so you would need to build your whole system around that or use Level Shifters.

so far i've made 2 VGA Controllers that barely fit into an ATF1508 using Verilog:
one that uses bitmap graphics (320x200 using 640x480, at 1BPP, you can choose 2 out of 64 colors for the whole screen)
and the other uses Tilemap graphics (320x240 or 40x30 Tiles, using 640x480, still at 1BPP but you can choose 2 colors per Tile out of 16 colors total)
both of them use a single 8kB Dual Port RAM IC to interface with a 65C02, i've been trying to find a way to avoid the need for DPRAM but i can't really fit any kind of interface logic into the CPLD that would allow me to use normal SRAM.

i have also been thinking about using SPI as an interface between a VGA Controller and a 65xx system using 65SPI. it would allow for a 3.3V VGA Card using a more modern CPLD or FPGA as you only need to level shift the single direction SPI lines (plus an Interrupt line)
hmm, something to think about i guess.

for an ASCII compatible character set i have just been using this:

either way i hope to see more experimenting you do with this board, maybe you could try a sound chip, since i've never seen a CPLD based custom sound chip for 65xx systems before

[CountChocula]

Proxy wrote:

very interesting! 192 Macrocells and it directly supports Verilog without the need for POF2JED like the ATF15xx series does.
though it doesn't appear to be sold anymore (atleast on mouser) and other sites like UTsource it costs between 4 and 6 EUR/USD per IC.
another downside is that it only runs at 3.3V maximum, so you would need to build your whole system around that or use Level Shifters.

You can find it on Aliexpress for ~2-3 USD per—of course, with the usual caveat of buying things from Aliexpress (though I will say I haven't had much trouble with them at all).

The 3.3V supply does present a bit of a problem, but I suspect that would apply to most CPLDs/FPGAs of decent capabilities; I'm going to try interfacing to my SBC through a TX0608e, but I'm also noodling with switching over my design to 3.3V just to see what the tradeoffs are in practice.

Quote:

so far i've made 2 VGA Controllers that barely fit into an ATF1508 using Verilog:
one that uses bitmap graphics (320x200 using 640x480, at 1BPP, you can choose 2 out of 64 colors for the whole screen)
and the other uses Tilemap graphics (320x240 or 40x30 Tiles, using 640x480, still at 1BPP but you can choose 2 colors per Tile out of 16 colors total)
both of them use a single 8kB Dual Port RAM IC to interface with a 65C02, i've been trying to find a way to avoid the need for DPRAM but i can't really fit any kind of interface logic into the CPLD that would allow me to use normal SRAM.

Very cool! I really wanted to implement a tilemap, but I just couldn't figure out how to fit it in the available space, so I made a different set of compromises. That's definitely in the to-do list for my next design, though… when I eventually get to it

Quote:

i have also been thinking about using SPI as an interface between a VGA Controller and a 65xx system using 65SPI. it would allow for a 3.3V VGA Card using a more modern CPLD or FPGA as you only need to level shift the single direction SPI lines (plus an Interrupt line)
hmm, something to think about i guess.

Yes, that is an intriguing thought, though I wonder whether having to serialize everything would end up affecting performance too much. My design also only needs unidirectional level shifting, which does simplify things a little bit.

Quote:

for an ASCII compatible character set i have just been using this:

dllhost_LhguIwdZx0.png

either way i hope to see more experimenting you do with this board, maybe you could try a sound chip, since i've never seen a CPLD based custom sound chip for 65xx systems before

Thanks for the font! I will give it a go. I'm still a bit unsure about what to do for sound, TBH—I've been putting that off till the end while I was trying to figure out the rest, and video seemed like a harder nut to crack (and it was… I've been trying to build a video interface using discrete logic for months!). My current thinking is to use some kind of MCU; there are some from Microchip that come with dual DACs and enough memory to make a synthesizer possible. With a CPLD, I would be worried about having enough room to store wavetables, though the MAX II does come with 1kiB of flash RAM, so it might work in the end.

Another thing I want to play with is replacing the 50MHz oscillator on that board with a 100MHz one to see if it still works reliably. That would double the number of memory accesses that can be performed in between pixels, thus opening up some interesting possibilities.

Cheers!

[Proxy]

CountChocula wrote:

You can find it on Aliexpress for ~2-3 USD per—of course, with the usual caveat of buying things from Aliexpress (though I will say I haven't had much trouble with them at all).

The 3.3V supply does present a bit of a problem, but I suspect that would apply to most CPLDs/FPGAs of decent capabilities; I'm going to try interfacing to my SBC through a TX0608e, but I'm also noodling with switching over my design to 3.3V just to see what the tradeoffs are in practice.

hmm, i have never used Aliexpress before, and seeing all the horror stories of the quality of products i'm rather hesitant to try it, plus since it's an SMT package you can only really test the ICs after you soldered them onto a board, which does make it more risky.

running a whole SBC at 3.3V shouldn't be much of an issue, the 65C02/816 can likely run at 16MHz at 3.3V, and 3.3V SRAM/FLASH is insanely cheap.
for example you can get 10ns 32kB SRAM for like 1.30 EUR/USD on Mouser, and 70ns 128kB FLASH for 1.20 EUR/USD.
downside is that you'll have to solder SMT when dealing with 3.3V Systems as not everything is aviaible in socket-able packages like PLCC or DIP.

CountChocula wrote:

Very cool! I really wanted to implement a tilemap, but I just couldn't figure out how to fit it in the available space, so I made a different set of compromises. That's definitely in the to-do list for my next design, though… when I eventually get to it

honestly when i made my version i did kinda cheat.
I'm using a Logic Simulator called Digital to design and test the VGA circuit (it has a very accurate built-in VGA component) and when i'm done i just go to file -> export to Verilog, and then import that into Quartus II.
it has worked perfectly so far, but it also means i'm probably wasting some performance/logic compared to just writing Verilog myself.

CountChocula wrote:

Yes, that is an intriguing thought, though I wonder whether having to serialize everything would end up affecting performance too much. My design also only needs unidirectional level shifting, which does simplify things a little bit.

specifically i've been thinking of using these IO Expanders to connect any kind of 8-bit Parallel peripheral via SPI, though something like a sound chip seems like a better idea as that doesn't need a lot of bandwidth compared to a video circuit that could require updating the whole screen 60 times per second or more.
it would still be an interesting idea because then you could also hook it up to a Microcontroller, just imagine an Arduino with good video output that doesn't stress the MCU!

CountChocula wrote:

Thanks for the font! I will give it a go. I'm still a bit unsure about what to do for sound, TBH—I've been putting that off till the end while I was trying to figure out the rest, and video seemed like a harder nut to crack (and it was… I've been trying to build a video interface using discrete logic for months!). My current thinking is to use some kind of MCU; there are some from Microchip that come with dual DACs and enough memory to make a synthesizer possible. With a CPLD, I would be worried about having enough room to store wavetables, though the MAX II does come with 1kiB of flash RAM, so it might work in the end.

Another thing I want to play with is replacing the 50MHz oscillator on that board with a 100MHz one to see if it still works reliably. That would double the number of memory accesses that can be performed in between pixels, thus opening up some interesting possibilities.

Cheers!

you only need a wavetable for sine (or other complex waves). Square, Triangle, Sawtooth, and Noise can all be made using binary counters (and an LFSR for noise).
the main problem is just timing, dividing the input clock down enough that you can make audiable noises. even at 1MHz you need a 16-bit counter to reach the bottom of human hearing (15.25Hz).
anyways this is about video and i don't want to derail the thread.

100MHz for 640x480 would give you 4 Memory cycles for each pixel. in theory that allows for 32-bit color per pixel. seems a bit overkill though.

my VGA controllers both run at 25MHz and access Memory at 12.5MHz. the bitmap one needs 1 memory cycle every 8 pixels (or 16 cycles), the tilemap one needs 3 memory cycles per 8 pixels (or 16 cycles).
if you want to you can check out my Tile based VGA Circuit:

ATF1508-VGA-40Tx30T.zip

(29.06 KiB) Downloaded 282 times

but be warned that even i barely know what is happening in there, so it might not be that useful.
but if you want to try out Digital for yourself maybe you can make use of it (the SNYC circuit is pretty solid and can be used for something else)

[CountChocula]

Proxy wrote:

hmm, i have never used Aliexpress before, and seeing all the horror stories of the quality of products i'm rather hesitant to try it, plus since it's an SMT package you can only really test the ICs after you soldered them onto a board, which does make it more risky.

Yep, all fair points. My experience has been really quite positive, that's all

Quote:

running a whole SBC at 3.3V shouldn't be much of an issue, the 65C02/816 can likely run at 16MHz at 3.3V, and 3.3V SRAM/FLASH is insanely cheap.
for example you can get 10ns 32kB SRAM for like 1.30 EUR/USD on Mouser, and 70ns 128kB FLASH for 1.20 EUR/USD.
downside is that you'll have to solder SMT when dealing with 3.3V Systems as not everything is aviaible in socket-able packages like PLCC or DIP.

Agreed. I used to think that soldering surface mount packages was a much bigger deal than it's turned out to be; my only real beef is that, unless you find something available in PLCC, which is increasingly rare, they are unsocketable, which makes it impossible to reuse them from one board to another. It's basically impossible to make something that looks good without committing to never reusing a chip again

Quote:

honestly when i made my version i did kinda cheat.
I'm using a Logic Simulator called Digital to design and test the VGA circuit (it has a very accurate built-in VGA component) and when i'm done i just go to file -> export to Verilog, and then import that into Quartus II.
it has worked perfectly so far, but it also means i'm probably wasting some performance/logic compared to just writing Verilog myself.

Oh that's really cool! I'll check it out, thanks for the pointer.

Quote:

specifically i've been thinking of using these IO Expanders to connect any kind of 8-bit Parallel peripheral via SPI, though something like a sound chip seems like a better idea as that doesn't need a lot of bandwidth compared to a video circuit that could require updating the whole screen 60 times per second or more.
it would still be an interesting idea because then you could also hook it up to a Microcontroller, just imagine an Arduino with good video output that doesn't stress the MCU!

Ah, interesting, I didn't even know that chip existed.

Quote:

100MHz for 640x480 would give you 4 Memory cycles for each pixel. in theory that allows for 32-bit color per pixel. seems a bit overkill though.

What I like about it is that it allows accessing more than one memory location per pixel—so for example you could store a palette in RAM and use indexed colour instead of RRRGGBB, which is a bit of an awkward format. Mostly, though, I'm just curious to see if I can drive the circuit at that speed without it blowing up

Quote:

my VGA controllers both run at 25MHz and access Memory at 12.5MHz. the bitmap one needs 1 memory cycle every 8 pixels (or 16 cycles), the tilemap one needs 3 memory cycles per 8 pixels (or 16 cycles).
if you want to you can check out my Tile based VGA Circuit:

ATF1508-VGA-40Tx30T.zip

but be warned that even i barely know what is happening in there, so it might not be that useful.
but if you want to try out Digital for yourself maybe you can make use of it (the SNYC circuit is pretty solid and can be used for something else)

Thanks, I'll check it out!

[CountChocula]

Time for a quick update: I finally got the PCB for my reference design, and it looks pretty spiffy:

Soldering the CPLD to the board was quite the adventure… the first attempt ended up releasing a bunch of magic smoke, but the second time around I took care to avoid shorts and it worked right away. I was silly enough to place the decoupling caps on the other side of the board—a mistake that I'm not going to make again, because they're a pain. Also, I think that I should make a version of the board that acts as a shield that connects to the MAX II development board, which should eliminate the need to solder SMDs altogether.

I was pretty surprised to find out that the circuit worked right away… it only needed a bodge wire because I had forgotten to force the RAM's chip select line low. It took a little doing to interface it with a version of my 6502 SBC running at 3.3V, but only because I had forgotten to qualify the chip select line with PHI2, much like you have to do when interfacing to RAM.

Once I figured that out, it worked like a charm with the 6502 running all the way up to 13MHz (at which point my SBC ceases to work for reasons that I have not yet investigated—I suspect that the video interface can handle faster clock speeds). Here it is connected with some temporary wires while I await angled pin headers from China:

I also managed to make the interface's registers readable (previously, you could only write to them), although I have yet to bother enabling read access to the onboard video RAM.

I'll send one more update once I have a demo to show and maybe some additional functionality that I'm working on.

Cheers!

[plasmo]

Very Cool!

Max II has up to 1K of internal flash memory which can serve as bootstrap ROM so you can boot from Max II then load application program from CF or SD. It is possible to build a very simple 3.3V standalone 6502 system consists of 6502, Max II, system RAM, video RAM, SD/CF and PS2 keyboard.
Bill
PS, if you design in schematic you can squeeze even more functions into Max II.

[fachat]

Interesting. I'm using the Xilinx xc95288xl CPLD for exactly such a system in my MicroPET design, but it costs way more than $10. On the other hand it's 5V tolerant which helps with attaching 5V IO (Commodore PET compatible), without the need of voltage converters between cpu/ram/cpld and IO.

[CountChocula]

plasmo wrote:

Very Cool!

Max II has up to 1K of internal flash memory which can serve as bootstrap ROM so you can boot from Max II then load application program from CF or SD. It is possible to build a very simple 3.3V standalone 6502 system consists of 6502, Max II, system RAM, video RAM, SD/CF and PS2 keyboard.

Thanks, Bill! I really wanted this to be a standalone board for now, both because it might be useful to others, and also because at some point I want to experiment with a more powerful CPLD to see if I can add features like sprites.

My SBC already incorporates an ESP32 that provides flash storage, bootstrapping, and—once I get a new version into the design—support for USB, so I think I'm good on that front, at least for now. The only concern I have is that I'm using an ATF22v10 for some of the glue logic, and that's not rated for 3.3V operation, though it seems to work just fine. Maybe at some point I will push the logic into the Max II

Quote:

PS, if you design in schematic you can squeeze even more functions into Max II.

I figured as much, and now that I have a working prototype I really would like to try and redesign some of the functionality using a discrete circuit. It seems like it would be a valuable skill to learn!

[CountChocula]

fachat wrote:

Interesting. I'm using the Xilinx xc95288xl CPLD for exactly such a system in my MicroPET design, but it costs way more than $10. On the other hand it's 5V tolerant which helps with attaching 5V IO (Commodore PET compatible), without the need of voltage converters between cpu/ram/cpld and IO.

Yeah, the 5V tolerance thing does limit the capabilities of the design a little. OTOH, the code should be fairly portable, so hopefully it's still useful!

[BigDumbDinosaur]

fachat wrote:

Interesting. I'm using the Xilinx xc95288xl CPLD for exactly such a system in my MicroPET design, but it costs way more than $10. On the other hand it's 5V tolerant which helps with attaching 5V IO (Commodore PET compatible), without the need of voltage converters between cpu/ram/cpld and IO.

Atmel's CPLDs are also five-volt-tolerant and are current production.

[CountChocula]

A final update on this project: I have added support for reading the video RAM and for blanking interval detection/interrupt. This makes the interface with the host computer bidirectional and allows for smooth animation.

I still plan to create an advanced version with a customizable palette and support for sprites, but I'm going to call this version of the project complete for now—if for no other reason that I have used all but one of the available macrocells in the CPLD

The interface works really well, incidentally. I was able to test it with my SBC running all the way to 20MHz and it's nice, responsive, and completely glitch-free (though, in all fairness, my code isn't yet fully optimized).

Just for fun, here are a couple shots of the card plugged into the SBC, and some 80-column text output from the SBC to my VGA monitor, using Gordon's most excellent font (thanks again, Gordon!).