Check out http://www.opencores.org
The site has a number of Video, VGA and DVI cores in either VHDL or Verilog.
Update: One of the cores I learnt from was TinyVGA. I basically used that to understand how to make a VGA output:
1) You need to choose a resolution and look up parameters. Here are a few.
2) Pixel clock must be generated. Many CPLD's have an internal clock that works just fine. For high accuracy you may want an external clock as they tend to give better images.
3) Generate sync signal based on a pixel counter (using pixel clock edges). VGA is based on the old CRT electron beam scanning, so you have to think of it as scanning a single line at a time (in horizontal direction). From the parameters you can see when to set sync LOW or HIGH (for +sync its HIGH most of the time and LOW between end of front porch and sync end, for -sync its the opposite).
4) Count horizontal lines and generate vertical sync according to parameters.
5) Generate RGB signal. The number of bits you choose is to your liking. More than 5-6 bits per color without an external VGA chip is wasted time as you will loose the resolution in noise when using direct CPLD output lines. The simplest it 1 bit per color as the PONG game: http://www.fpga4fun.com/PongGame.html or like the project here, 4-bits per color.
The easiest way to generate RGB signal in the CPLD is to use 1 byte per pixel per color. If you for example have 1280x1024 at 60Hz (108MHz pixel clock) it will require 3*108MByte/s memory access. E.g. a memory bus of 324*8=1992Mbit/s. With fewer bitplanes you can get away with less. For a CPLD with internal memory this is usually not a problem since you can have a bus of 16, 24 or 32 bit width. But it needs to support the pixel clock access speed.
Happy coding!
