I've started this thread because I need to get some thoughts out of my head and into reality before I forget. I need to make room for other logical thoughts and I don't want to forget, which seems to be happening more often now.
In the past, I would've done this on paper, but doing so within this forum has proven to be more productive, with all the most valuable input I get from seasoned engineers and other specialists.

.......

I plan to continue to use expresspcb service to make the new boards. I've gotten used to their software, and the resolution is very respectable at .001". In v1.1, 3 4-layer miniboard Pro boards were done close to perfection. I had only 1 issue, Arlet had found after receiving his board, where the software did not detect a problem with a via and trace being too close together. It affected operation of the I2C lines. I think my design violated the spec of .015" between only 1 via and trace. Note, that the design also was pushing the max of 350 holes for this service. The software had detected other similar issues during the design...

Anyway, these miniboard Pro boards for v1.1 of the Dev. Board were 3.8"x2.5" at a respectable $98US for 3 identical boards. I have 1 fresh untouched/unpopulated board left. PM if interested.

For v1.2, I plan to use expressPCB's 4-layer ProtoPro service. These boards can have a max of 650 holes! Also, the new boards go up to 21sq" rectangle, with no side exceeding 12". I'll receive 4 boards for $195US. These new boards could have a config of 5"x4.2". This would support a backplane type of interconnect system 'amongst' boards. In v1.1 only 1 daughterboard at a time was planned to be plugged in.

This 21square inch rectangle size is what I'm currently working on in my spare time, in order to accomodate some more useful ICs, features, and header interconnects.

Any feedback always welcome! and more details to come.

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65Org16:https://github.com/ElEctric-EyE/verilog-6502

Looking at some prices for 32Mx16 SDRAM (MT48LC32M16A2 – 8 Meg x 16 x 4 banks) price has come down to ~$22US almost half of what it was 6 months ago.
So this will go on the board as well as a single footprint that will support pass-through synchronous ram with delay of 6.5ns. Can support CY7C1473BV33 (4 M × 18), CY7C1463AV33 (2 M × 18), or a CY7C1373D (1 M × 18). Prices for these are still abit high at $140, $60, & $33 respectively. In addition, at least one 64Mbit FLASH of type SST25VF064C will be fitted.

There will also be a Video DAC, and VGA connector, push-in/push-out style SD card connector. PS2 connectors for a keyboard and mouse. Also, the same USB to UART MCP2200 which has performed very well on v1.1. A single power connector will be used with an allowed input voltage of 6-~20VDC.

I don't want to get too far ahead of myself, but I believe everything I've mentioned should be able to fit on the board. Although I've not even begun placement yet.

In v1.2 I would like to narrow the focus to graphics and video on a 16-bit platform. Maybe some high quality audio if there's room for some more IC's. I'll have to wait and see.

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65Org16:https://github.com/ElEctric-EyE/verilog-6502

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x86?  We ain't got no x86.  We don't NEED no stinking x86!

The silkscreen helps with this issue, unless your hands are shaking really bad, splashing solder all over the place!


Constraints do make one work harder to make the design work. I do remember Dr. Jeff pointed out to me at some point during v1.1, some suggestions/techniques in order to save about 50 holes. It's a challenging excercise! and rewarding.


So is the miniboard Pro service. Same professional 4-layer quality, but just restrained to 3.5"x2.8" and you only get 3 boards, but for only $98US.

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65Org16:https://github.com/ElEctric-EyE/verilog-6502

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x86?  We ain't got no x86.  We don't NEED no stinking x86!

when it comes time to go past the limits of EPCB, I am a nut for Kicad which is a freebie. I know there is a lot of Eagle love, but God help you if you are on a budget and need a large board size.

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"My biggest dream in life? Building black plywood Habitrails"

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x86?  We ain't got no x86.  We don't NEED no stinking x86!

The only times I can think of where a soldering iron could have damaged solder mask was when not specifying SMOBC, solder mask over bare copper. If the solder mask is over solder plating on the copper, then there's nothing to hold it when the copper is above the melting temperature of the solder. It has been decades though since I've had any soldermasked boards that were not SMOBC'ed. Our boards certainly can take a lot of poking and scraping with a soldering iron without damaging the soldermask.

My CAD has DRC, design rules checking, but it doesn't understand the unconventional things we're trying to do, so it could give a list of hundreds if not thousands of DRC violations and when I look at them one at a time, I see there's no problem; so I quit using the DRC many years ago, and just do a visual check. Actually it's only one thing on a rather long list of things I check, based on experience. Boards are right the first time.

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http://WilsonMinesCo.com/ lots of 6502 resources
The "second front page" is http://wilsonminesco.com/links.html .
What's an additional VIA among friends, anyhow?

EPCB is good on their production. MY biggest beef there It hink, their output not being Gerber, so you are locked in.

Best thign on Kicad I love: FREE with no sizing upgrade limits garbage. My pinball board was done in Kicad by the way.

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"My biggest dream in life? Building black plywood Habitrails"

'Locked-In'. That's the way I feel with EPCB. But it's not too bad. I should be able to copy and past entire sections of my previous smaller board into the larger v1.2 board.

So the price went up ~$15 per board for another 300+ holes and a slightly larger board size, but now I get 4 boards.

EPCB model is good for hobbyists. They cover all the bases. But as you say the design is not transferrable to another house.

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65Org16:https://github.com/ElEctric-EyE/verilog-6502

One of the main considerations for board layout is for the board to be able to be stacked for multiprocessor use. My inspiration comes from this thread. Initially I was thinking of a horizontal stacking arrangement. However, this is turning out to be too difficult. Now I'm thinking about each board having a right angle connector. Then they could be plugged in vertically and spaced appropriately so as not to have any interference. The only downside to this idea is this would require another board, the mainboard that connects them all together. So now the main constraint is the connector size. A 96-pin connector should be sufficient, and 3 row 96-pin connectors are easy to find. These connectors are 3.3" long so the max connector board would be ~6.3" long (assuming the 21sqin max that EPCB has for ProtoPro service). This would fit about 10 boards.

I'm still working on the multiprocessor aspect. But now that the .b core has relocatable zeropage and stackpages, I think each board would have an identifier signifying which space it is in. I've fuzzy ideas ATP. Since I am a n00b in this area, I've decided to do some research starting, predictably, here.

EDIT: Ok, this seems tackleable! after reading this quoted from wikipedia:"A computer program is, in essence, a stream of instructions executed by a processor. These instructions can be re-ordered and combined into groups which are then executed in parallel without changing the result of the program. "
I've made my plot routine for the original 6502 (1 accumulator, 2 registers), then modified it to work on my .b core (16 accumulators, 3 registers). Now how to do this plot routine on 1 on more cores in parallel to observe the same result. This is pre-theory even!

Another interesting read here, which basically says "With the end of frequency scaling, these new transistors (which are no longer needed to facilitate frequency scaling) can be used to add extra hardware, such as additional cores, to facilitate parallel computing - a technique that is being referred to as parallel scaling."

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65Org16:https://github.com/ElEctric-EyE/verilog-6502

Sounds like something similar to what Daryl worked out.

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x86?  We ain't got no x86.  We don't NEED no stinking x86!

The technique of programming a 6502 type core for parallel computing evades me. There are alot of variables to consider that my mind cannot currently grasp. This is OK though, I will still design the v1.2 board with this potential in mind. Until I fully understand it though, I won't finalize the design as inter-communication between the cores may require more internal signals be brought out of the cpu core.


Where is this information present BDD?

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65Org16:https://github.com/ElEctric-EyE/verilog-6502

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x86?  We ain't got no x86.  We don't NEED no stinking x86!

Ah, I thought you were referring to the multiprocessor aspect. I've seen his thread there before...

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65Org16:https://github.com/ElEctric-EyE/verilog-6502