Sam's latest video is a short one, summarising that last year he was able to make a few chips with a 5 micron PMOS process and a total of 6 transistors in the form of a differential amplifier. Details
from his website:
Quote:
I designed the Z1 amplifier looking for a simple chip to test and tweak my process. Layout was done in Magic VLSI for a 4 mask PMOS process (active/doped area, gate oxide, contact window, and top metal.) PMOS has advantages over NMOS as far as mobile ionic contamination that lends it to being fabricated in a garage.
The feature (gate) size is approximately 175μm although there are test features as small as 2μm on the chip. Each amplifier section (center and right) contain 3 transistors (2 for long-tailed differential pair and one as current source/load resistor) which means a total of 6 FETs on the IC. The left portion of the IC contains resistors, capacitors, diodes, and other test features used to characterize the fabrication process.
Some of the early HP calculator chips were PMOS - it's a simple and robust process, not especially fast or power efficient. It's a long way from 6 transistors to a CPU, let alone a very specific CPU like the 6502, but it will be interesting to follow Sam's progress.
Quote:
...to do this at home I've had to build and acquire quite a lot of specialized equipment ... this project was great because I got to learn so much about so many different fields ... I also had to deal with a number of hazardous chemical like hydrofluoric acid phosphoric acid sulfuric acid hydrochloric acid and number of others