What is everyone's opinion on using Asynchronous as apposed to Synchronous SRAM. The Asyrchronous is a bit cheaper. What are the drawbacks other than wait-states?

It appears all references to the Terbium seem to have been removed from WDC website. What does this mean? Most likely they have stopped development.

Hi Ruud,

thanks for the input. If you look above, you will see that we resolved the issue. I had my assembler set to a starting address of $0000 when it should have been $E0000. I over looked this, as I was possitive it was a hardware issue. Initially it was, as I didn't have any RAM at all for ...

I'm happy .... I owe you an appology... That was it.

Again, I wasn't thinking very good... That's kind of an obvious error. I'm pretty new at assembly programming, so I'll use that as my excuse.

Thanks Again.

Hi,

I don't think the .ORG $0000 is it, as once assembled, I am burning it to the beginning of my ROM according to my ROM, but once I insert it, It becomes $E000, and my Reset Vector points to $E000 as well.

Also, it does execute the beginning of the code... enough to initially turn on the LED's ...

Here's my current code:

; Program NCS ROM2 $0000 to $1FFF 01/24/2007
; Flashes alternating LED's connected to 6522 Port 'A' & 'B'

.ORG $0000
Out_B = $8000 ;Output Port B 6522
Out_A = $8001 ;Output Port A 6522
DDR_B = $8002 ;Data Direction Register Port B 6522
DDR_A = $8003 ;Data Direction ...

Well, my RAM is working now. I used a 74LS00 to combine the PH2 and R/W. I have confirmed the RAM is working properly, but my system still freezes after the first setting of the 6522 ports.

I know the RAM is working, because I modified my program to store the value I want to send to Port A and ...

I think, to keep it simple, I might stick whith a 7408. I'll gate the R/W with the PH2, as this won't require adding gates to my 74LS138 for memory decoding, so I shouldn't run in to speed issues. I'm only running at 2Mhz anyway, so I should be safe.

.... On second thought... I guess I should use 2 ...

So, I could use an 74LS08 to gate the R/W and PH2. What is the reason for this? Why does my ROM chip not require gating with PH2?

Well, I put a 2K RAM chip starting at $00, and it didn't seem to make any difference, although abviously I need RAM, but I must have other problems as well.

I am in the process of checking over my whole setup, and I have a question.

When keeping the RDY pin high, should I be using a 3K pullup, or ...

Well... that's probably it then.... cause I don't have any RAM at all!! I guess as soon as you do any branching, the stack need memory. I feel kinda stupid now!

Well, I have a 6502 CPU with a 2864 EEPROM chip, and a 6522 VIA memory mapped with a 74LS138. I have 16 LED's connected to the 16 I/O pins from ports A and B on the VIA.

The initial code turns on Every Second LED by sending a $AA to the ouput ports of the VIA.

The LED's then look like this ...

Woops... I meant an 74LS04....

Could I prevent the LED's being an issue if I used an 74LS138 hexinverter as a buffer between the 6522 and the LED's?

Even when they are connected to a 6522? Isn't that something you might expect an I/O chip to do? What is it about an LED that would cause a CPU to crash?

Thanks