I ran into this strange behavior of the BIT operation. The BIT operation does two things:
Bits 7 and 6 of operand are transfered to bit 7 and 6 of SR (N,V);
The zero-flag is set to the result of operand AND accumulator.
I'm still trying to get my emu to pass Klaus tests, and I'm running ...
Search found 4 matches
- Sat Jul 09, 2022 9:07 pm
- Forum: Emulation and Simulation
- Topic: Help in understanding what happens each cycle
- Replies: 11
- Views: 9788
- Sat Jul 02, 2022 9:33 pm
- Forum: Emulation and Simulation
- Topic: Help in understanding what happens each cycle
- Replies: 11
- Views: 9788
Re: Help in understanding what happens each cycle
Thanks BigEd, this was just the response I needed to get some confidence in how I interpret the logs and documentation! I'm sure more questions will pop up shortly! 
- Fri Jul 01, 2022 8:13 pm
- Forum: Emulation and Simulation
- Topic: Help in understanding what happens each cycle
- Replies: 11
- Views: 9788
Re: Help in understanding what happens each cycle
Welcome! I'm having trouble accessing visual6502 but I have a local copy (you could download one from the Wayback Machine.) I'm not so familiar with perfect6502 - the model is fine, I'm sure, but I don't know about the inputs or the interpreting of the logs
I've compared visual6502 and ...
I've compared visual6502 and ...
- Fri Jul 01, 2022 4:46 pm
- Forum: Emulation and Simulation
- Topic: Help in understanding what happens each cycle
- Replies: 11
- Views: 9788
Help in understanding what happens each cycle
So I was quite happy about my 6502 emu. And then I started comparing logs with visual6502/perfect6502. Aaaand... no.
It's something about the "pipelining" that just breaks my brain. At least I think it's related to that.
For testing, I created a very small program:
start:
ldx #$02
loop:
dex ...
It's something about the "pipelining" that just breaks my brain. At least I think it's related to that.
For testing, I created a very small program:
start:
ldx #$02
loop:
dex ...