Hi dclxvi,

[1] Could you be more specific? This doesn't sound familiar, but I'll give it a shot if you tell me what each step is.

The code segment goes something like this:

Result = Accumulator + 1's Complement of Memory Byte + (Carry Flag * 16)
If the Result is greater than 127 or less than ...

Hi,

I've noticed two things with regard to SBC in a few 6502 emulators on the Internet that I can't explain:

[1] When setting or clearing the overflow flag during SBC, some emulators shift the carry bit to the bit-4 position.

[2] When performing BCD calculations during SBC, 66 (hex) is ...

Hi,

I've been reading up on the CMP instruction (CMP and SBC are the only two that are giving me any grief) and I found some really good information on this web site, and I was doing well until a question poped into my head.

It says on tutorials/compare_beyond.html that "both [CMP and SBC] affect ...

> There should be far more text in the source code explaining than there is of actual instrucions.

I completely agree with you Garth.

My code is full of comments with references as to where I got the information. The reason I ask half the questions I ask is because I look at other people's code ...

Hi,

Can anyone tell me what would happen if a call was made to SBC without a call to SEC first?

Thanks,

Andrew

Good Day,

I have a question... :?

Assume that an Op Code is being executed under the Absolute X addressing mode. The Op Code itself is on a memory page.

According to the docs I have, the Op Code is followed by two bytes that form a 16-bit address and are added to the X register to form an ...

The other processor status bits are not specified to be one way or another, and the A, X, Y, and S (stack pointer) are not specified to have any particular value.

Hey Garth,

A document from Western Design Center shows the RESET pushing the Program Counter and Processor Status Flags onto the ...

Hi,

After a RESET is performed what is the value of the following registers and the stack pointer?

Accumulator
IX
IY
Processor Status Flags
Stack Pointer

The reason I'm asking is that I have conflicting sources of information and I was hoping there would be an expert on here who could help me out ...

Thanks for the clear response .

Andrew

Hi,

I read that in when in decimal mode the Zero Flag is invalid. What does this mean? In other words, does it mean that the Zero Flag is not updated?

Thanks,

Andrew

> Sorry, I meant Zero Page Indirect (zp,X).

Now I think you mean Zero Page indexed indirect, like AND (ZP,X), which takes six clocks.

We'll I copied it right out of the manual so I'm pretty sure I meant Zero Page Indirect (zp,X).


> Doesn't this mean that it will take an additional six ...

Sorry, I meant Zero Page Indirect (zp,X).

But your response never answered the question either.

According to the documentation the addressing mode takes six cycles to obtain the absolute address (and data) that AND will work with.

Doesn't this mean that it will take an additional six cycles to ...

Hi,

I'm looking at the Addressing Modes in Western Design Centers w65c02s manual and noticing that the addressing modes have clock cycles beside each of the steps taken during the address mode.

For example,

Under Zero Page Indexed X:

Clock Cycle. Contents of Address Bus, Contents of Data Bus
1 ...

This may sound like a really stupid question to diehard hardware buffs: is the Data Bus in the 6502 signed? or unsigned?

Initially, I thought it was unsigned (please... don't ask why), but now I'm pretty sure it's signed because of something I noticed with the Relative addressing mode and how can ...

I'm asking because I'm working on an 6502 emulator and you're right that although I don't need to know what the chip's doing with the byte that's on the Data Bus (I can store it in a variable), I am interested in understanding what the chip itself does with the previous byte on the Data Bus - I mean ...