I've discovered the problem. My branch implementation is fine (I did add your suggestion of adding a sign to the relative vector in C though), it was the preceding operation that was messed up. The opcodes for the two versions of the BIT instruction were swapped, so the ZP BIT acted like an Absolute ...

A branch offset should not be added to the PC of the branch instruction, but to the PC of the following instruction.

If you can (persuade your compiler to) sign-extend the offset byte, you won't need to treat forward and backward branches any differently.
I thought I had implemented that because ...

Back again. To clarify again about the ANTIC-GTIA comparison... according to my spec the AVR uses display lists/non maskable interrupts very similarly to the way ANTIC does it, and the color palette (a 256 color YUV palette) and operation of sprites will be very similar to GTIA. It's not identical ...

OP here for an update. The specification document is finalized more or less, and I've been working on an outline for a computer to host the display AVR should it ever come to fruition, and a ROM for such a computer. The emulator will target this currently-nonexistent system. I guess my rationale is ...

Thanks Ed.

I've decided to hold off on actually building or buying anything until I have a simulator and some test programs. I've got a probably 65% complete 6502 emulator in C and the framework is already there in the program for some sort of video emulation that displays via SDL. I'll try to ...

Hi. My first 6502 related project is now in debugging phase (curse my decision to use 4164 DRAM) and I'm looking ahead to what to do next. I want to do a video-based project, but nobody makes a good VDP chip anymore, I don't want to use an old one, and I don't want loads and loads of 7400 logic ...

The wikipedia page is the best place to start. It contains a pinout and detailed register functions. For voltage characteristics and otherwise the internal Atari datasheet has those. I'm updating the OP now to include my assembler code.

Hi there. I made a thread here a while ago with some pretty newbie questions and ideas about how to make a 6502 system. (Like trying to divide memory with only NAND gates.) I've learnt quickly after that and I breadboarded a mostly-functional 6502 system a few months ago. Making modifications was ...

Update: Sorry it's been two days, but I haven't been able to work on the project til now. I got a decoder working using a '08 Quad AND and a single Quad NAND, instead of two of the 00 Quad NANDs. (I know it works cause I hooked the logical output to 4 LED's and fiddled with two input wires til it ...

Yeah, I tried multiple designs of decoder with the 00's after I posted that message and I didn't get any working properly. :( I'll look for the 74HC139, it looks exactly like what I need for splitting memory into 4 segments.

If you mean the VIA by "I/O", I'm embarrassed to say I'm not sure about ...

Thanks you two for the help! I think I managed to sort-out the problems with the decoder circuit (shown below). I have two 74LS00 Quad NAND's that the circuit below uses fully. As for refresh, I'll place a manual refresh routine on a timer interrupt set for every 2 ms, which shouldn't take up huge ...

DRAM is mostly for the sport, and also because had a supply of it off-hand.

I saw the 32 K RAM/16 K ROM circuit earlier on your site, and it looked like the closest to what I need. That circuit gets everything divided into 3 sections, but I need some more comparisons to occur. Would this circuit ...

Hey there. I've recently begun working on my own design for a 6502 computer. The system is based around 24 MCM4116 DRAM chips, totaling 48 KB of RAM. In order to precisely determine how to wire the 4116 chips in series, I did a test with an Arduino Uno that was successful in writing and reading from ...