It would be interesting to know if this extension could help existing computers from the '80s. I can think of only one system that could benefit: the Commodore +4. The Commodore +4 uses a port at 1 for communicating with serial devices, such as disk drives, so the extension could provide a faster ...

IMHO all matters relating to this instruction extension remain rather controversial...WDC created the 65C02. What was the reason that some second-source manufacturers got the extension and some didn't?
As is customary in the world of proprietary chip designs, most purchasers of the 65C02, e.g ...

IMHO all matters relating to this instruction extension remain rather controversial. It used to be said that all the undocumented instructions of the NMOS 6502 were replaced by new typical/standard instructions or NOPs. However, it seems that all 65C02 chips manufactured by WDC have this extension ...

Thank you very much. So it seems that only Rockwell documented the use of these instructions. The WDC documentation doesn't mention them but all (?) the WDC chips support them. There were also Japanese and other companies that were second-source...

I am curious to know which manufacturers have realised Rockwell bit instructions (RMB, etc.). It is definitely WDC. GTE and CSG 65CE02 did not realise them. What about the others, such as Synertek?
Interestingly, it seems that the BBC Model B+ uses the Rockwell 6512, which supports these ...

My gosh! It seems I made a stupid mistake. STA ABS,X ALWAYS takes 5 cycles but I counted it as 4 cycles. Excuse me, I am ashamed much. Sorry.

Thanks but it seems this problem is too hard for us. :( Perhaps those two cycles are part of the universe's infinite, global uncertainty. :)
I think I'd recommend somehow checking with Hoglet's 6502 decoder.
https://github.com/hoglet67/6502Decoder
Could you tell me which part of this large project ...

I want to write an exact cycle counter for the 6502, but I think I've missed something. My counter always loses 2 cycles and I can't figure out why. :( I can only hope that a 6502 expert can help me...
In detail, I count all the cycles per screen. I use the raster interrupt on the same line to start ...

I encounter several interesting boards. It's just to share with fans.

I have tested this with several Commodore +4 emulators: my old Forever+4 and the best plus4emu. Both have successfully passed the test. Commodore emulators need to be very accurate at each CPU cycle because there are a lot of demos and games that depend on this accuracy.

IMHO ancient computers had more spirit than modern ones. Children can feel this.

We may also remove ORA (and use AND and EOR instead), ROL (use ADC), INC (use ADC), BNE (use BEQ and JMP), and BCS.

Thanks for the interesting information. However I can't help but express my sadness that something similar to the ez80 for the 6502 world has not yet been created. :(

Have you done any native-mode 65C816 assembly language programming? Your comment suggests to me you have not. Otherwise, you’d know ...

Perhaps I am mis-remembering, but I don't think you need to specifically trim the high byte on the 65816. I think you can just transfer A into the Bank register; because the Bank register is only 8-bits the upper half gets chopped off in the process, regardless whether you're in 16-bit or 8-bit ...

Seeing a discussion of near and far pointers in C brought back unhappy memories of MS-DOS and 16 bit Windows programming in the early 90's. Large programs were constructed using overlays, and as your program grew, you would have to rework the overlay arrangement.

The whole thing was brittle house ...