in your opinion is this a dumb way to learn how processors work?

Ok thanks! I was hoping to design a cpu on a logic simulator that's compatable with 6502 asm, but since I still dont quite understand how the 6502 PLA works I was thinking of using a rom where part of the address is the timing, part of it is the opcode, and part is for interrupts, and the address ...

I've looked at diagrams and some articles but is there something I'm missing? is there somwhere where this information is? I think there's a video somewhere but I couldnt find it.

I'm not sure if I should look on ebay for these, but I've also noticed these other WDC chips, are those chips the same as 6502 or otherwise compatable?

What I'm understanding is that the PLA is an easier way to decode a signal into a broken up set of selectors for the function components that the instruction calls for depending on the timing.. so if the opcode for LDA zeropage is A5, that will break down into selecting different parts at different ...

I have read a bit on how the 6502 processes instructions but im still a bit confused. From a diagram of a normal pla there is an input with a normal line and an inversion of that same line, and there are lines of the array attached to nothing, then those lines lead to the nor section which go down ...