Hi cpow
That's a really interesting result: you fired an NMI in the middle of the 7-cycle interrupt sequence as it was handling an IRQ, and it fetched the NMI vectors.

More interesting:

http://visual6502.org/JSSim/expert.html?graphics=f&loglevel=2&steps=100&a=fffa&d=3000&a=fffe&d=3000&a=0030&d ...

Uh, where did this word "preamble" come from? Does the manufacturer of another processor family use it? The data books from 6502 manufacturers Western Design Center, Rockwell, California Micro Devices, GTE, Synertek, and Commodore all call it "interrupt sequence ." After the end of the interrupt ...

I simulated an NMI occurring during the 7-cycle IRQ preamble...it does overlap.

http://visual6502.org/JSSim/expert.html?graphics=f&loglevel=2&steps=100&a=fffa&d=2000&a=fffe&d=2000&a=0020&d=e840&a=0010&d=58eaeaeaeaeaeaeaeaeaeaeaeaeaeaeaeaeaeaeaeaeaea&r=0010&nmi0=29&nmi1=30&irq0=21&irq1=22&logmore ...

Well, I'm one of a multitude of NES 2A03 emulator authors, and the 2A03 I believe is NMOS, so I'm 'worried' about how properly to emulate the NMOS BRK/NMI bug.

Perhaps a different way to phrase the question...

If I'm in the 7-cycle preamble for an IRQ and NMI has asserted before I get to the vector fetch cycles, which vector gets fetched in the *current 7-cycle preamble? IRQ, right? Then as soon as I'm done with the IRQ 7-cycle preamble I start the NMI 7 ...

Welcome.

Thanks!


I'm not sure exactly what you're asking, but any given instruction finishes before the interrupt sequence is started. The interrupt sequence is itself like an instruction. Even if IRQ hit and its interrupt sequence starts and an NMI hits during that sequence, the IRQ's ...

Hi, I'm looking for an answer to the following question. I *think* I know what the answer is but I haven't been able to find it anywhere conclusively.

When the 6502 is in the midst of a 7-cycle sequence for a BRK or IRQ and an NMI occurs, does the NMI 7-cycle sequence start immediately, or does the ...