"Mike. Those chips don't really have flip flops. That would be too expensive in terms of transistors. They mostly use clocked gates instead of flops. And they also use a lot of async latches."

Sure, but I see a lot of inverter pairs with transfer gates between them driven by the two clock phases ...

Well, I've been learning quite a bit about NMOS the last few days, my previous experience has all been with CMOS.

I'm working on pre-optimizing the netlist in my software before the VHDL stage. I remove all duplicate transistors now, and I am working on spotting inverters and simple flops and ...

Hi Ijor,

Certainly there were no standard libraries used for the very early chips. For the later ones (Atari ST/Amiga days) they were built using standard cells.

The libraries were specific to the gate array being used for that project, but at least all the 2 input and gates look the same ...

Thanks for the pointers Ed,

Having access to the professional tools does help, one of the advantages of working at a company which designs ASICs :)

Even though I work more with FPGAs than the ASICs nowadays I try and drive the layout tools occasionally otherwise I forget everything pretty fast.

I ...

Ruud,

The T80 can certainly be speeded up but not easily in it's current state.
It's designed to reflect the (guessed) underlying hardware so all through the MCode section you will see MCycle used to tell it what to do on each cycle.

It would be better to branch the code, flatten the microcode ...

Thanks Ed.

I've got quite a bit of experience going from net lists (or GDS files) back to VHDL, I've been working on some Atari ST chip for a while.

For chips which were built from a standard cell library it's quite a bit easier as you can identify the groups of transistor in the cell and replace ...

Hi,
No, I haven't really pushed it.
I did achieve 40MHz with no problem in a Virtex4 - I am sure it would go quite a bit faster on modern FPGAs.

I don't know what happened to Daniel, we were in regular contact, then a few years ago I never heard from him again.

Best
Mike

Hi,

My name is Mike and I took over the T65 core a few years ago.
I've just got CVS access to opencores, so I will push back some changes.

The latest version is at www.fpgaarcade.com in the library

you'll also find a very elegant table based 6502 core there as well - my 68000 core in development ...

Hi all.
I maintain the T65 core (www.fpgaarcade.com) which is (so I'm told) one of the more accurate VHDL implementations.

As an ASIC designer, I have to say this visual6502 is an amazing piece of work - congratulations to all involved.

I also have to say I never thought I would see a javascript ...