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Would anyone happen to have resources to help me better understand hardware and software implementation of PIB (parallel interface bus) on a pair of W65C265S MCUs? I'm very interested in a sample schematic of a PIB implementation, and any code samples would also be quite helpful. I have been scouring through the '265 datasheet, monitor ROM manual and source code, and SXB documentation. I'm working on a dual-265 SBC, and I have too many gaps in my understanding of PIB.

Thanks!

Rich
https://www.rehsdonline.com/post/w65c26 ... d-computer

I wish I could as I keep looking at the '265 and thinking "that looks useful". And then dig into the datasheet and kinda go "yeah, nah" and go back to the '816

Quick question: is the parallel interface bus a '265 specific thing or is it just a pair of '265s on the same parallel bus?

It's a specific feature of the '265. WDC describes it as "The Parallel Interface Bus (PIB) is used to communicate instructions and data to and from task oriented processors, smart peripherals, co-processors, and parallel processors." As I understand PIB, it's essentially a private 8-bit data bus between the MCUs and controlled/used through registers and interrupts.

Here's where I'm currently at with connectivity between two '265s. Thanks to handyandy for suggestions on this design. I'll be ordering a first attempt of a PCB for this later this month. I'll post an update when I can validate the design. Thanks!

I have PIB working! Below is what I ended up with for connections to connect two '265 boards. For the most part, connect port 4 to port 4 and port 5 to port 5 (minus the NMI and IRQ lines of port 4).
In case anyone is interested, I posted additional details, including code to https://www.rehsdonline.com/post/w65c26 ... ce-bus-pib.