6502.org

Here's a circuit that adds six more IRQ vectors to the W65C816, for a total of seven, triggered by hardware priority.

The circuit detects when the IRQ vector $FFEE-FFEF is being pulled using a 3-to-8 encoder to detect when E and VPB are low, indicating that an interrupt vector is being fetched in native mode. Additionally A4 must be low (excluding the fetch of the RESET vector at $FFFC-$FFFD), and A3-A1 must all be high (excluding the fetch of the COP, BRK, ABORT, and NMI vectors).

Seven active low hardware IRQ inputs are provided, numbered 0 to 6, with the lower number taking the higher priority. A priority encoder encodes the winning IRQ number, and it is added to bits A1-A3 (with potential carry to A4) by a 4-bit adder. This effectively adds an offset of $00, $02, $04, $06, $08, $0A or $0C, to the vector pull, resulting in a fetch of one of the following seven potential IRQ vectors.

An IRQ output, active low, is provided whenever one of the seven hardware interrupts is asserted.

Here it is in black-on-white, for our colorblind members, particularly since one of them can't see green lines, especially against a yellow background:

Thanks for the feedback, everyone.

Sorry for posting it in color, I'll be more respectful and post only black and white from now on.

Here's the same circuit with suggested changes HC family logic, and a 0.45 Vf Schottky diode and 3.3K resistor for the IRQ pull.

I've added notations showing that the outputs AA1-AA4 are the rewritten address lines A1-A4, and are to be passed onto the bus as such.

I haven't tested the circuit, just wondered if the idea might provoke discussion.

Particularly, I wonder whether having separate hardware interrupt vectors in this way even would be a useful thing on a 65816 based computer. It would shorten IRQ handling, by acting as a dispatcher to the correct handler (well, up to 7 of them anyway) as soon as the IRQ occurs, rather than having a generalized IRQ handler that checks every possible IRQ source in turn.

One other thing to note is that since the IRQ vector for Emulation mode (6502 mode) could also be rewritten using a similar circuit: here the rewritten vector table might be

Here's an omnibus version that can do vector pull rewrite for either a W65C02, or a W65C816 in either native or W65C02 emulation modes.

I added a buffer with three state outputs, to keep the offset at $0 when there's no active input coming from any of the 7 hardware IRQ lines.