Programming ATF150x with Openocd
Posted: Tue Jan 09, 2024 8:07 am
PART 1
Hi all,
After having spent hours & hours of head scratching and web searching I finally got a toolchain working for programming ATF1504s.
Several people commented that it would be a good idea to document my work. So here goes...
Toolchains
These are my current toolchains for SPLD and CPLD development. I'll say it again, I'm a NEWBIE to the world of GALs / SPLDs /CPLDs. I started reading about them (on this forum, of course) less than a year ago, when I started *really* designing my 6502 WBC (c) Garth Wilson. That is to say once I realized that I could greatly reduce address decoding delays by "simply" replacing my 74xx138s with an SPLD.
All that I document here is the result of my long uphill struggle to get a) my brain around the new ideas; b) the tools to work...
So, what I use to effectively design for and "burn" :
ATF16V8/ATF22V10 : WinCUPL -> (.jed) Arduino AfterBurner
ATF150x : WinCUPL -> (.jed) ATMISP -> (.svf) OpenOCD + USB Blaster
(I'm also evaluating "Digital", which is a GREAT xPLD learning tool, also the generation of either WinCUPL input files or .jed directly)
So, let's get started. Turning an idea into a working design and .jed file.
WinCUPL (version 5.30.4 Atmel) running under/inside Wine (8.0.2)
Spoiler alert : I can't/won't give any real development advice here : perhaps someone on the forum could help-out...
But I *have* braved the dragons to especially understand how the simulator works, 'cos it's very useful for seeing if the CPL code actually works as expected!
Some things I've found out by accident and error, however :
Hi all,
After having spent hours & hours of head scratching and web searching I finally got a toolchain working for programming ATF1504s.
Several people commented that it would be a good idea to document my work. So here goes...
Toolchains
These are my current toolchains for SPLD and CPLD development. I'll say it again, I'm a NEWBIE to the world of GALs / SPLDs /CPLDs. I started reading about them (on this forum, of course) less than a year ago, when I started *really* designing my 6502 WBC (c) Garth Wilson. That is to say once I realized that I could greatly reduce address decoding delays by "simply" replacing my 74xx138s with an SPLD.
All that I document here is the result of my long uphill struggle to get a) my brain around the new ideas; b) the tools to work...
So, what I use to effectively design for and "burn" :
ATF16V8/ATF22V10 : WinCUPL -> (.jed) Arduino AfterBurner
ATF150x : WinCUPL -> (.jed) ATMISP -> (.svf) OpenOCD + USB Blaster
(I'm also evaluating "Digital", which is a GREAT xPLD learning tool, also the generation of either WinCUPL input files or .jed directly)
So, let's get started. Turning an idea into a working design and .jed file.
WinCUPL (version 5.30.4 Atmel) running under/inside Wine (8.0.2)
Spoiler alert : I can't/won't give any real development advice here : perhaps someone on the forum could help-out...
But I *have* braved the dragons to especially understand how the simulator works, 'cos it's very useful for seeing if the CPL code actually works as expected!
Some things I've found out by accident and error, however :
- I work exclusively on Linux, and WinCUPL wants DOS/Win file endings, so before opening WinCUPL I run a short script on my .CPL file to ensure that I haven't left any non-DOS line endings (as I often forget and open the files with a linux editor instead of notepad)
Code: Select all
#!/bin/bash
if [ $# -eq 0 ]
then
echo "Please supply a filename or file range"
exit 1
fi
sed -i '/\r/! s/$/\r/' $1
- as one should, for any sort of development (but we all get carried away, don't we), build and test little functional modules first and assemble them later - it avoids annoying the error dragons inside WinCUPL...
- keep archive copies of WIP, or better-still a revision mgmt. system, so you can roll back to the last version that worked just before that last bell/whistle that broke everything...