6502.org

In another thread, VinCBR900 suggested an interesting concept: And, in a previous post,... This sounds like terrific fun, and because of its scope I feel it deserves a thread of its own.

-- Jeff

I don't think 6116 SRAMs were available in 1976. The Acorn Atom was produced in 1979 and that used 2114 RAMs (1Kx4). Apparently 16K DRAMs were first produced in 1975: https://smithsonianchips.si.edu/augarten/p50.htm

Unfortunately they were not, hence suggestion to cheat a little with Mostek bytewide sram which were available late 1970s.

To differentiate from something like Grant Searle's minimal 7-chip Basic system, the key challenges are 28 pin CPU, no expensive ACIA/Uart/RIOT, with fewest parts.

It seems to me a 7474 flipflops with one FF for serial out and another for handshake are adequate for the bitbang serial port. Not my idea, I believe it has been done already for few low-cost RC2014 designs.
Bill

At the time a MOS 6532 would have been a likely choice. I don't think 128 bytes of RAM would be enough for a useful basic, so maybe it's not sufficient. But it was commonly used to implement a serial port, so at least that problem is solved. According to Wikipedia the Intel 2114 was introduced in 1975, so looks like that chip could be used. So a design like the Jolt computer appears to be valid. As plasmo mentioned, probably the lowest cost option would be a a flipflop for the serial port, but I think a more common design at that time would be a 6504/6532 combination with some 2114 RAM.

A first attempt (missing oscillator, bypass caps', etc.). Tiny BASIC will fit in 4K of ROM, correct?

Something like Mike's 6504 Single Board Computer. Definitely a solid way forward, but against the self imposed rules (Apologies originally excluding UART/ACIA, but I also meant high integration chips like RIOT, so clarified above) as the 6532 would have been expensive. Good attempt - I like the Open Collector address decoding. However 6264 with its handy dual CS pins was not available in the 1970s. AFAIK The Intel D2186 was the first 8kbyte (pseudo) SRAM and was available in 1982. Could carry forward the LS145 to try and map the 74LS74 to get a 2 bit output port in zero page, with a pair of 2114's for ram.

Good point about Tiny basic - Palo Alto 8080 Tiny Basic did fit in 2kbyte eprom. According to Jeff Tranters excellent pages, Apple 1 integer basic required 4k but the simpler Tom Pittman's Tiny Basic which may have been 2kbyte.

Layering projects, we could consider porting Oscar Toleda's BootBasic, which is a tiny basic in <512bytes of 8086.
https://github.com/nanochess/bootBASIC

I'm pretty sure the 2732 wasn't out in 1976. The 2716 might be a stretch too. More like the 1702 or 2516.

2114 were common and some other by 1 bit sizes too.

I've got a gold C2186 ES that I've been wanting to power up. It is a DRAM with internal self refresh used as SRAM. The D2004 next to it is a 256 byte SRAM with parallel load/unload NV storage from 82 period.

Greg

VinCBR900, is it fair to say you'd prefer to avoid 4-bit-wide RAMs like those Garth suggested? In an earlier post you said, "we might need to cheat a little on dates for the SRAM with a Mostek MK4801 or MK4802," and these Mostek chips are byte-wide devices.

Certainly a byte-wide chip is much more manageable if you intend to use a solderless breadboard. And you've said the design is very much a work in progress.

Seemingly the spec's are somewhat fluid, too... all of which is 100% okay; I'm just hoping to clarify what the goals are (or could be allowed to be). You've mentioned low cost, but I wonder if that's perhaps not really the main theme.

Plainly you've taken an interest in c0pperdragon's project, which uses a 40-pin 65xx CPU on a breadboard. Perhaps your goal is simply to do something similar, but with some extra coolness added!

Any comment? Switching to a smaller, 28-pin CPU is pretty cool, so you're off to a good start!

-- Jeff

I found them.  These are .300"-wide 18-pin devices, TMS40L47-45NL, so an 8-bit pair, end to end, would take up the length of a 36-pin DIP but be skinnier.  All the date codes are 1980 and '81, so I don't know if that's too new for the vintage goal.

I hope to find time for a second attempt but I'm concerned it still may not be "period correct" or "low cost"...

I hope I am not annoying everyone being new here

Grant Searle did the a nice 7 chip solution with an ACIA and modern memory, so repeating that is not new.

What got me thinking is that several early CPUs used by hobbyists and students used bitbang serial ports e.g. 1802, 2650, 8085, INS8060, to save cost. What can we do that we might have been able to do in 1976 when Tiny Basic really took off, setting aside the need for a TV Typewriter II with Serial interface and GI AY-5-2376 ASCII keyboard with 74LS165 shift registers.
This would have been lowest cost then, so some nice gold lidded 2114s would be period correct and appropriate, even though they are more expensive than larger SRAM now.

So yes, can we do something as cool as C0pperdragon's design but using period correct parts, without high integration LSI devices, and run tiny basic. Its is never going to be used for serious work - I would use an nRF52 for that.

I'm not suggesting this as an additional competition rule, but it would be interesting for someone to build such a system with all IC's having date codes from 1976.