Can anyone give me a list of what the undocumented instructions of the MOS 6502 do? Undocumented as in undocumented (not listed on the NMOS 6502 Opcodes page).

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Sam

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"OK, let's see, A0 on the 6502 goes to the ROM. Now where was that reset vector?"

Since the 6510 is just a 6502 with an I/O port integrated into it (literally, that's the only difference), you might want to find the 6510 undocumented opcode map. With the ubiquity of the Commodore 64, this almost certainly will be far easier to find than the 6502's list.

Two things:

I didn't ask for the 6510 undocumented opcode map.

Where is that list, anyway?

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Sam

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"OK, let's see, A0 on the 6502 goes to the ROM. Now where was that reset vector?"

There's a list on my site, on the bottom of this section:
http://nesdev.parodius.com/#Docs6502

By all accounts I've heard, all CPUs based on the NMOS 6502 have the same undocumented ops. C64, Atari, and NES included.

I'm talking about undocumented as in not even on the "NMOS 6502 Opcodes" part of 6502.org.

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Sam

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"OK, let's see, A0 on the 6502 goes to the ROM. Now where was that reset vector?"

kc5tja suggested the C64's 6510 because internally it's the same processor and searching the C64 material would likely get you what you're looking for. I understand that Berkeley Softworks used the undocumented op codes when they wrote GEOS for the C64.

Memblers also understood what you wanted, and gave the link to his site which in turn has plenty of good stuff for you. Three of the links I found there dealing with undocumented op codes are:
http://nesdev.parodius.com/undocumented_opcodes.txt
http://nesdev.parodius.com/extra_instructions.txt
http://nesdev.parodius.com/6502_cpu.txt

These unofficial op codes however really should only be used for legacy code and hardware. If you want a more powerful 6502, you'll do much better to use the CMOS version (expecially WDC's, which are being made today), or the 65816.

Thanks! I've found all the opcodes from $00 to $FF.

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Sam

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"OK, let's see, A0 on the 6502 goes to the ROM. Now where was that reset vector?"

Correction: there is one opcode I can't find: $8B.

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Sam

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"OK, let's see, A0 on the 6502 goes to the ROM. Now where was that reset vector?"

The operation $8B is documented in 6502_cpu.txt, under ANE (thanks Garth.) "The BBC Lives" has an updated version of the document, with a few corrections plus a section on the Commodore memory map (which I wouldn't know anything about, I'm just a BBC Micro guy.)

We should really take this information and put together a good document for 6502.org.

On a similar note, another thing that needs to be done is expanding the opcodes page for the additional 65C02 and 65C816 opcodes.

Any volunteers?

Thanks,
Mike

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- Mike Naberezny (mike@naberezny.com) http://6502.org

By "expanding the opcodes page", do you mean something along the lines of the "NMOS 6502 Opcodes" (under the "Tutorials and Primers") for the 65C02 and 65816? If so, I'll volunteer for those. Rather than making one long document, I suggest three separate documents for the 6502, 65C02, and 65816. I would also suggest that the 65C02 document merely consist of the changes between the 65C02 and the 6502, since there are far more similarities (software-wise) than differences. The 65816, on the other hand, has very few opcodes with no changes and no additional functionality (CLC is one example). Even something like DEX which is 2 cycles and 1 byte under all conditions has a change in functionality: it's a 16-bit decrement when the x flag is 0, but an 8-bit decrement when x=1. Also, some examples that illustrate the "caveats" in the 65816 would probably be helpful, as these are somewhat lightly documented in the datasheet and WDC's Programming Manual.

I don't wish to discourage anyone from volunteering for the undocumented NMOS 6502 opcodes (I have a few 6502s, but have never really explored the undocumented opcodes myself), but I should point out that the various documents that describe these opcodes and the (cross) assemblers that can assemble them use names that differ from each other. For example, there are opcode names used in the March 1981 AAL article which do not appear in the documents linked above. It would be a good idea to do some research and gather as many different names as possible so that as many names as possible can be documented.

Thanks for the information. After long research, I found the source of a bug on Ultima I on my Apple ][ emulator and sure enough, it was caused by an undocumented opcode. So, I decided to implement them on my underlying 6502 emulator.

However, looking at the links above, I see conflicting information with regards to status flags. For example, for opcodes $83, $87, $8F, $93

Document 1 claims that:

AAX (SAX) [AXS]
AND X register with accumulator and store result in memory. Status flags: N,Z

Document 2 claims that:

AXS *** (SAX)
AXS ANDs the contents of the A and X registers (without changing the contents of either register) and stores the result in memory.
AXS does not affect any flags in the processor status register.


Document 1 is not clear if the accumulator is affected and claims flags N and Z are. Document 2 however is more clear, claims accumulator is not affected and no flags are affected. I am thinking on using document 2 for my emulation, just wondering if there is anything updated and more streamlined by now ?

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http://WilsonMinesCo.com/ lots of 6502 resources
The "second front page" is http://wilsonminesco.com/links.html .
What's an additional VIA among friends, anyhow?

Oh, great thanks. Very cool site and lots of information on those links.

"No More Secrets" https://csdb.dk/release/?id=198357is the best description I've seen. The most recent version includes the effect of the RDY pin on some instructions that had previously been considered to behave randomly.