New life for an old J.P. Designs Parallel 65 SBC
Posted: Thu Jun 24, 2021 9:51 pm
Hello all ... back in 1989 I bought a J.P. Designs Parallel 65 SBC (*) for a model railway project. I still have the receipt, purchase price back then was £127.02! The project never went anywhere but I still have the SBC. The board has R6502A, 6264 8kx8 static RAM, 2764 8kx8 EPROM, R6551 ACIA, 4xR6522 VIA, and the following for glue logic: 74HC74, 74HC04, and 74LS138. Finally a 1488 and 1489 provide RS-232. The 138 decodes A13/A14/A15 to give 8 8k blocks, phi1 (yes phi1) being used as input to the 138 to qualify the /CE outputs. On the 6264 and 2764 /OE and /CE are connected together. The 6502 runs at 1Mhz.
Finding a bit of free time recently whilst other projects are on hold I decided to get the SBC out for a bit of fun. I removed the 1488 and 1489, fitted a couple of jumpers, connected a 5V RS232 to USB adapter, and applied power. It worked
Now thinking I'd like to get back into playing with the 6502 family - I had an Acorn Atom back in the late 70s and a loaner BBC micro in the early 80s. I'm contemplating upgrading to a WDC65c816, 32kx8 CMOS static RAM, and using a 8kx8 NVRAM (STMicroelectronics M48Z08-100PC1?) in place of the EPROM. Glue logic would be updated to decode 32k+(8*4k) and would use phi2 to qualify R/W to generate /OE and /WE. I'd also like to use the existing PCB as much as possible cutting a few tracks and rewiring where necessary. For the 65816 and new glue logic I'm thinking of a small point to point wired daughterboard connected to the 40 pin header conveniently provided on the original board which breaks out the original 6502.
This raises a couple of questions:
1. should it be ok to mix the modern CMOS chips with the older NMOS chips - I'd rather not replace the VIAs and ACIA if not necessary, in fact I'd rather retain the original ACIA in order to avoid the well documented transmit bug in the 65c51.
2. with reworked address decoding and glue logic nothing would require the old 6502 phi0 or phi1 so I assume I can just ignore those, simply rerouting the external clock that would have gone to phi0 on the 6502 to phi2 on the 65816.
I've noted the various posts and resources on 6502.org re replacing a 65(c)02 with an 65816 so am aware of the pins that have been repurposed and how they should be connected.
Anything strikingly wrong with the above approach? What have I missed?
This is my first post having lurked around for some time. Hoping to tap into the wealth of knowledge here in the forum.
(*) searching 6502.org and more widely has drawn a blank on J.P. Designs boards. Anyone else out there have one or remember them?
Finding a bit of free time recently whilst other projects are on hold I decided to get the SBC out for a bit of fun. I removed the 1488 and 1489, fitted a couple of jumpers, connected a 5V RS232 to USB adapter, and applied power. It worked
Now thinking I'd like to get back into playing with the 6502 family - I had an Acorn Atom back in the late 70s and a loaner BBC micro in the early 80s. I'm contemplating upgrading to a WDC65c816, 32kx8 CMOS static RAM, and using a 8kx8 NVRAM (STMicroelectronics M48Z08-100PC1?) in place of the EPROM. Glue logic would be updated to decode 32k+(8*4k) and would use phi2 to qualify R/W to generate /OE and /WE. I'd also like to use the existing PCB as much as possible cutting a few tracks and rewiring where necessary. For the 65816 and new glue logic I'm thinking of a small point to point wired daughterboard connected to the 40 pin header conveniently provided on the original board which breaks out the original 6502.
This raises a couple of questions:
1. should it be ok to mix the modern CMOS chips with the older NMOS chips - I'd rather not replace the VIAs and ACIA if not necessary, in fact I'd rather retain the original ACIA in order to avoid the well documented transmit bug in the 65c51.
2. with reworked address decoding and glue logic nothing would require the old 6502 phi0 or phi1 so I assume I can just ignore those, simply rerouting the external clock that would have gone to phi0 on the 6502 to phi2 on the 65816.
I've noted the various posts and resources on 6502.org re replacing a 65(c)02 with an 65816 so am aware of the pins that have been repurposed and how they should be connected.
Anything strikingly wrong with the above approach? What have I missed?
This is my first post having lurked around for some time. Hoping to tap into the wealth of knowledge here in the forum.
(*) searching 6502.org and more widely has drawn a blank on J.P. Designs boards. Anyone else out there have one or remember them?