6502.org

This message is not specific to 6502 but uses a variation of a circuit commonly used in contemporary 6502 systems and unconventional numeric representation suitable for 6502.

While prototyping a seven bit, dual core, clock stretching circuit (which definitely works with 25MHz input), it occurred to me that a minor variation of the circuit may be used to produce high quality audio. The minimal implementation requires two 8 bit latches and four 4 bit counters. The preferred embodiment requires an additional two counter chips to obtain a superset of 8 bit linear PCM.

The clock stretching circuit produces square waves with a minimum of two ticks high and two ticks low. Either phase may be extended by 2^N ticks. In the case where A+B=260 ticks, the result is 8 bit linear PCM from a one bit DAC. However, where A+B<>260, other ratios are possible. In the case where PWM incurs strictly one less tick, it is impossible for the average to equal zero. In this specific case, the average is very close to -1/2 or +1/2. Near the middle of the range, this is a good approximation of 9 bit quality. Similar reductions most heavily strake the middle of the range such that a rational approximation routine or look-up table may approximate 11 bit quality or better. With 16 latch bits, it is not possible to attain 16 bit audio quality. By counting, all representations where A=B are functionally equivalent. Likewise for integer multiples. Regardless, the scheme is equally bad at approximating linear and logarithmic PCM.

One of the problems with the use of PWM to obtain 16 bit sound is the obscene clock frequency. To obtain 65536 linear intervals within a 48kHz sample, a 3.15GHz clock is required. However, if the length of the interval is variable but restricted such that A+B<=260, we only require a 12.48MHz clock. Indeed, this frequency is only a recommendation. If you only have a 16MHz ceramic resonator, a 24MHz crystal or 28MHz NTSC/PAL crystal, that'll do.

You may assume that free running counters, loaded asynchronously, would have terrible quality. However, I assure you that the aggregate non-linearity is the opposite of a tinny one bit DAC. An ex-classmate wrote a utility to downsample PCM audio by reading two values and writing the value with the greatest magnitude. This process may be repeated, as required. The intention is to create thumping bass. Where a DAC with rational ratio over-runs its time-slot, it is most likely to occur in the phase with the largest magnitude. The result is a more moderate version of a PCM bass thumper. Furthermore, error is proportionately reduced with the repetition of full cycles. This occurs when sample frequency is reduced or the DAC is clocked faster. This leads to the counter-intuitive effect that a rational DAC becomes bassy when it is driven too fast.

There are many other sources of error. Some errors may be reduced by synchronously loading latches, alternating latch writes or sensing DAC phase prior to write. However, gains are minor because jitter (and race conditions) may remain. An effective technique to reduce error is to synchronously write upper nybbles first and wire latches appropriately. This requires zero additional hardware while incurring zero additional jitter. In particular, it keeps one source of transient error outside of the four most significant bits.

For some mad reason, I thought that it would be a really good idea to layout a quad rational DAC on a 100mm*100mm board. The result of this attempt was mixed.

I've had multiple false starts with microcontrollers and processors. I've also had multiple false starts with circuit design. I started using KiCAD in Jan 2020 but quickly found it to be overwhelming. I quite like the schematic capture. That is the typical barrier for most people. However, I had no idea how to specify the size or shape of a board. I still have no idea how to specify surface mount component placement.

I tried out-sourcing design in Feb 2020. Unfortunately, Internet connectivity to the Sheep Pen was, erm, tenuous. I tried another attempt at out-sourced design in Jul 2020. My plan was to out-source some trivial designs as a matter of due diligence and then offer more substantial work to a successful contractor. I was looking to be genuinely wowwed by someone who, for example, knew how to draw an uninterrupted "edge cut". After four hours of complaining on upwork.com's "live chat" I obtained a USD100 refund for an 18 LED design which failed to meet any criteria of my 600 word specification. I wasn't asking for anything complicated. Just little things like "make it credit card size", "put wires on one side only", "make the labels such that silk-screen is optional". (I was only planning ahead for high volume production.)

I hoped to be wowwed and awed. The result was worse than my very first attempt using KiCAD. To make matters worse, upwork.com's website is so broken, I felt like the victim in a confidence game where the website was almost being written on demand. The only part of the website which didn't break was the "live chat" which seemed to be mostly automated. After this incident, I got my credit card number changed because it is very much the type of website which will get hacked. The website sprawls across multiple virtual hosting companies and outsourced services, everything is styled until interactive elements are unrecognizable and there is zero vetting for any skill of any contractor. The only vetting concerns laundering. Even here, there is a conflict of interest where any party can offer "work", any party can accept "work" and upwork.com takes 20% for being the unwitting financial laundry. Where does the money go? Much of it goes into fixing a constantly broken website.

By Feb 2021, I passed the first anniversary of not getting any circuit board manufactured. In particular, I was willing to pay USD1000 for an AVR version of MicroCoreLab's MCL65+ (and at least another USD300 to ensure that the contractor was suitable). When I teach programming, I mention that Napster (the person) went from non-programmer to millionaire within 18 months. Napster knew how the Napster application should function and its appearance. However, Napster couldn't write a specification or afford to out-source it. Instead, Napster was an annoyingly persistent lamer on multiple programming forums. Learning to use KiCAD *must* be easier than programming Napster. And the only way to achieve this target in the remaining six months was to not out-source it.

By Jul 2021, I spent more than 200 hours using KiCAD. That's six weeks over six months. Objectively, I curse more frequently when using KiCAD than when I use vim and I curse at both because they have unforgiving interfaces which encourage errors. There is a common misapprehension that vi and vim are text editors. I suffered under this misapprehension for more than 20 years. However, vi and its derivative are much more clearly understood as a collection of off-by-one errors operating within a modal interface. Apparently, if you put enough off-by-one errors in one place, they can be used to manipulate text. However, it is a category error to describe the result as a text editor. Unfortunately, one hour using vim remains preferable to one hour using KiCAD. The reason is that vim has the most forgiving interface. If I do something wrong in vim, I undo, switch mode and do it again. In KiCAD, you may, for example, specify a grid. Sometimes KiCAD draws the grid. Sometimes KiCAD follows the grid. Sometimes, you can draw the same thing five times before getting the desired result. Sometimes, it is easier to edit the saved state; manually or via a script. This is not a feature. Another reason to prefer a borked interface like vim is that I'm often programming. There is a creative tension and release which often occurs in cycles of 20 minutes or less. I have a creative urge to write a subroutine. 15 minutes later, the subroutine is written. With hardware, it is 12 hours of rising tension and I'm not even half way. When working with FPGA, signals have names and components form a modular hierarchy. KiCAD does nothing to encourage similar good practice.

In 1987, I started writing a circuit design program in BASIC. I am astounded that I should have continued. I'm not asking for Adobe Illustrator. I'd be quite happy with the functionality of OpenOffice Draw - and most people find that to be unacceptably poor for any task. I don't say this jokingly. A friend had a contract to teach circuitry to kids. I discovered this in a makerspace at midnight. On a computer which blocked software installs, I designed a flip-flop circuit in OpenOffice Draw. This was printed onto transparencies and UV etched. My friend took a bus to another city at 8AM and seven out of eight kids soldered a working flip-flop circuit with minimal help. My friend's panic was pleasant compared to using KiCAD. I don't have high standards. I just want holes and wires. Preferably on a grid. After using KiCAD for 20 hours, I shouldn't be thinking "Is it too late to download/write gif2gerber?"

I spent 14 hours doing schematic capture for a quad rational DAC. Then I spent seven hours doing layout. Then I spent 5.5 hours doing another layout. Then I abandoned a third layout. After a total of 38 hours, I had a design which was moderately acceptable. Amusingly, after designing for 38 hours, I thought "How do I export this data?" After reading some help text, "Oh that's what the plot menu item does!" I can appreciate industry anachronisms. However, there is a reputation for KiCAD being simultaneously lax, nannying and muddled. For example, there is an understandable assumption that schematic capture cannot be skipped. However, if the footprint editor is accessed via the layout editor, it is possible to insert any arbitrary footprint into layout and wire it without restriction. I'm not sure how I found this exception but it is bad design. Alan Kay stated that simple tasks should be simple and complex tasks should be possible. In KiCAD, the three dimensional viewer and microwave differential paths are simple. However, components are uniquely identified by hexadecimal Unix timestamps and their connectivity is somewhat strained across redundant, grammatically incompatible file formats and eight major modal interfaces, of which only two pairs seem to share any consistent implementation. It is a sprawling mess which is designed primarily to absorb funding from its major sponsors.

Eventually, I sent the DAC design to be manufactured. The result was pretty but there's absolutely no way that I can solder it. An 8 bit rational DAC requires two 8 bit registers (low phase duration, high phase duration) which reload the 9 bit counters. This can be compacted to 10 4 bit counter chips per channel. One strip of chips per channel can be arranged into two five chip clusters (low phase, high phase) where three chips are on one side of the board and the remaining two chips are on the other side of the board. Unfortunately, I doubt that I could solder one channel correctly. The integrated H-bridges (using 2222A transistors) are also too small. It is annoying because it works quite well on a breadboard.

It hasn't been a complete failure. I am now able to work at three times my initial speed - although I remain uncertain this has any commercial value. I have good practice with the "horizontal on one side, vertical on the other" principle. I first encountered this principle while studying the Commodore Amiga500 board but I recently discovered that the principle has been widely used since the 1960s; particularly on 16 bit mini-computers. Ignoring that, my effort has been little more than a "Hello World" of CADCAM but the metrics are useful. I designed a circuit with more than 750 pads. Indeed, as a ratio where 0% is empty board and 100% is perf-board, it is possible to exceed 50% - if I could solder it. This has led to more moderate chip stacking ideas where, for example, MAX3100 UARTs may optionally be fitted on both sides of a board or an optional third 6522 requires no additional board. More recently, I have discovered that it is possible fit a shift register, temperature sensor and real-time clock under one 6522. Most significantly, I discovered that that it is possible to fit 47 DIP chips onto one board (three DIP chips per square inch) while using less than one via per chip.

I am perhaps over-reliant on via count as a metric of quality. However, when I look at, for example POC2.0 or kalj's unnamed design, my thoughts can be politely re-cast as "What are you doing? No, really. Have you considered a design with less than 50 vias?"

I stared agog at the POC2.0 layout for about 4.5 hours over four sessions. Y'know, one signal switches layers six times. Nothing should exceed a dog-leg of two crossings - and even this incurs unwanted inductance. The flourish on the bottom left of the EEPROM is particularly revealing. Maximum symmetry could have been achieved by overlapping the A0 of the address bus and D7 of the data bus. However, asymmetry has be created by keeping them apart - for no good reason. Most worryingly, it took me more than one hour to recognize my own influence. Specifically, I find that my advice to *not* implement a parallel bus on a EuroCard or 100mm*100mm board has been taken as a challenge. I particularly appreciate the hedge where the dedicated parallel connector and EEPROM socket sit either side of the 100mm*100mm boundary. This only occurred to me after considering the EMF in three dimensions and this partly explains the experimental bus termination. It makes more sense when SCSI style active termination is re-located to the far end of a hypothetical stack. The upside is that a budget mini version of POC2.0 can be made without quad UART. Or perhaps alternative circuitry may occupy 1/3 of the board, such as sound and video.

After spending 38 hours on the XR8400 Series rational DAC, I might modify the design. The winner of PCBWay's third design competition was a 100kW IGBT controller. I had no idea this was possible. Unfortunately, the plans for this ostensibly open-source competition winning design have disappeared and have been replaced with promotion for a motor control venture. I have no idea how much "Intellectual Property" can be arranged around PWM but I suspect it is minimal. Well, rational DACs can control a poly-phase motor. I thought that 4kW was optimistic but perhaps I should raise my optimism. With the experimental USD8, 144mm^2, 4kW GaNFETs, it should be possible to make a ridiculously fast accelerating vehicle. Admittedly, the task is made easier by the almost linear acceleration of electric motors. Regardless, with one motor per wheel, enough phases per motor and enough wheels per vehicle, it should be possible to complete 1/4 mile standing start in less than 10 seconds - and do so without exceeding a 4kW per transistor limit. With this type of power envelope, a mission critical control system is required. Potentially, something used in pacemakers or engine control systems may be sufficiently reliable.

I'm not the only who has difficulty with KiCAD. Dave L. Jones decided to live-stream his first attempt at using KiCAD - which is brave - and converted the 6502 inspired Gigatron design from 2 layer to 4 layer prior to comparing different levels of unwanted electro-magnetic noise. The part where Dave L. Jones has difficulty exporting Gerber files is weirdly familiar. Indeed, it is a relief to know that it isn't just me.

Dave L. Jones used to be an alpha tester for Altium, so if Dave L. Jones says something is wrong in circuit design software then it is good judgement. If you are interested in writing circuit CAD software, the two hour session is worth watching in full. Likewise, if you prototype on 2 layer and hope that 4 layer will reduce noise then the 36 minute testing video is also worth watching in full.

I've also had the mis-pleasure of using a demo version of Coral Draw to fix a friend's board game box design. Top Tip: If you want to sell vector editing software then make sure that it is better than free software, such as OpenOffice Draw and KiCAD.

As a casual user of Coral Draw from 20 years ago, as someone proficient with GIMP, OpenOffice Draw, Adobe Photoshop and Adobe Illustrator, as someone who has recently spent 200 hours using KiCAD, you'd think that I'd adapt to Coral Draw quite easily. No so. I was again quite prolific with cursing. One of the many deficiencies is that Coral Draw's default interface is streamlined and therefore data, such as the tree structure of the vectors, is not shown by default. After all properties are added to the interface, the installation is completely unique and this makes it difficult to follow video tutorials. Furthermore, many of the properties are unavailable from a context menu. OpenOffice Draw has many deficiencies but its context menus are exceptionally good. Credit to KiCAD because ambiguous selections also lead to the impromptu creation of a fairly good menu.