6502.org

I'm sure this has been mentioned before (I searched but didn't find anything conclusive), but I'm curious how to design multiple devices that each need to connect to the /IRQ line.

I've read the primer (http://wilsonminesco.com/6502primer/IRQconx.html) and it "sorta" makes sense with the open-drain vs. open-collector. But I was confused on the "C = Total /IRQ Capacitance" bit. Guess I got some more learning to do.

But what I'm trying to do is basically connect two 65C22's, one 65C51 (or maybe vintage NMOS version) and one TMS9918 for raster interrupt.

I haven't decided what /NMI will be used for yet but I'm 99.99% sure it will just be one device that would use it.

Any tips or places to read up on would be appreciated.

Thanks!

The approach I used with SBC-4 was similar to the AVR microcontrollers. I integrated an interrupt status register and interrupt mask register into the board's CPLD. That way, each device IRQ was connected to the CPLD and the CPLD could mask or allow the IRQ to the processor. The processor could then read the status register to determine which device was signaling.

SBC-2 used diodes to allow multiple devices to "share" the IRQ input. The ISR had to poll each device to determine who caused the interrupt.

Daryl

Open-drain and open-collector are basically the same thing -- it's not a decision you need to make. Is that what's confusing the matter?

(Old TTL technology uses bipolar transistors, and one of the three terminals on a bipolar transistor is called the Collector. In our 65xx context we use Metal Oxide Semiconductors, and corresponding transistor terminal is called the Drain. But it has the same function.)

Thanks everyone for the fast responses.

I know I don't always use the correct terminology (I'm a software guy).
That sounds like what I would need to do. I'm using your SBC-2 computer as inspiration for my next build. I don't want to use CPLD at the moment. So if I have two VIA's, and the first one causes the interrupt, how would I "ask it" if he was the one?
His explanation was sound. I'm just slow when it comes to this stuff.
No, I basically just want to know how I can service whichever device caused the interrupt. Speed is not a huge issue at the moment.

The real unknown for me is going to be the TMS chip. I've never worked with it and interrupts before.

Thanks.

One thing to note is that modern 65C22's (Specifically the more common W65C22S, but not the 'N' variant) are not designed to have their IRQ output be wire-or'd. so I had spare pins on the GAL I use on the Ruby boards to create a simple 3-input OR gate with the output going to the 65c02/816 /IRQ pin. software polls each device with the most important one (the 1000Hz ticker) being checked for first on each IRQ. A side effect is that there is no need for the pull-up resistor on the 65C02's /IRQ input pin.

(I have another reason for feeding them through the GAL, but that's not important here)

See page 31 of the WDC 65C22 data sheet.

-Gordon

I'm sure you mean open-drain versus totem-pole.  As Jeff explained, open-drain and open-collector outputs do the same thing.  They can only pull down; so if two or more outputs disagree, there's no contention.  A totem-pole output OTOH can pull up as well as down.  In the open-drain or open-collector situation, the only thing that can pull up is the pull-up resistor.

The capacitance spoken of is the small amount that's in the circuit that you cannot get rid of.  Every IC input, every socket, every trace that's anywhere near another conductor, etc. will have a few picofarad of capacitance, and it adds up.  The rise time is produced by the resistor trying to charge up that capacitance.

A totem-pole output can bring it up much faster; but you don't want two or more totem-pole outputs connected together, since the current will be very high if one is trying to pull down while another is trying to pull the same line up.  You won't damage anything if the situation is only microseconds long, but the sudden current spike might yank a chip's VDD and Vss internal voltages around enough to shift input thresholds enough to crash the system.

You would read the IFR of each VIA and check bit 7 to see if it is set. If it is, then check the other bits to see what action caused the interrupt (Timer1, Timer2, CB1, CB2, Shift Register, CA1, or CA2).
If it's not set, then check the next device the same way.

Daryl

Ah, thanks for pointing that out. "S" is what I have in stock. So I will need to order some "N" versions to do an wire-or'd setup.
Yeah, I meant totem-pole. So from what I am gathering, totem-pole is much faster but more complex. Especially with adding additional components (AND) and possible contention. I assume the smarter move for me (at least for now) is to stick with the wire-or'd setup?

AH! OK, this was the obvious bit I was missing. I was thinking the wiring/hardware was somehow telling the CPU which device interrupted it. But the reality is you just simply ask everyone in the room.

So this brings up another question...what if literally all four devices threw an interrupt at the same time? I assume at this point, it's just a matter of designating a desired order. So, the video chip always comes first...VIA #1 comes second...etc.

Yep, I've been reading through that again. I've read it before but it's been a while.

Thanks to all of you. I couldn't build this without you!

Polling chip registers for finding the /IRQ source might get slow when there are a lot of chips.

Some time ago we had a topic about vectored /IRQ interrupts,
but implementing something like this in a 6502 computer might require some hardware tinkering,
and I think maybe it's a bit too much for this project.

Mightn't be too hard to register a number of IRQ lines, in parallel with ANDing them, so the CPU gets a conventional IRQ and can then read an 8 bit register to see which one fired.

Although, the combination of tactics, whereby the most time-critical potential source is checked first, and where the ISR has knowledge of which IRQs are enabled, is probably enough for most cases.

Thanks again everyone for the great information.

I'm re-reading the IRQ primer again. Also, I've found some designs online that I will study as well.

Once I get that all wrapped up, I may ask for constructive criticism later on.