A/V SBC with Multiple 65xxx CPUs
Posted: Sat Dec 14, 2019 10:52 pm
Board Description:
The 4 layer board measures 2.5" (63.5mm) x 4.5" (144.3mm). It's a design that has evolved from past projects that have primarily focused on video. This new board can also display 1080p 16-bit 5-6-5 RGB video using a VGA connector, but now can also accommodate audio I/O.
There are 2 Spartan 6 FPGA's, each of which can control up to 2 4Mx18 250MHz NBT (No Bus Turnaround) SyncRAMs wired to form 8Mx18. [more to add here]
All IC's are powered by 3.3V with 5V needed for the Audio and USB. A rather tight voltage range of 5V-5.5V @5 amps is needed for the main power supply input. Close to 3 amps (max) are used by the SyncRAMs alone (@250MHz).
The I2C bus:
1) A programmable CMOS crystal oscillator with a frequency range of 100kHz to 212MHz. Boot address: $55
2) A resistive touchscreen controller. Boot address: $48
3) Digital audio transceiver. Boot address: $80
The SPI bus:
1) SD Card controller.
2) 256Mb FLASH.
I/O Connectors:
1) 2mm x 5.5mm 11Amp main power receptacle input.
2) 4 pin FFC connector for resistive touchscreen input.
3) VGA output.
4) JTAG for programming FPGA's. Digilent HS-1 Rev A JTAG programming cable is used. Digilent HS-2 & HS-3 are currently available.
5) USB for keyboard input, PC communication.
6) micro-SD card for storage, data exchange.
7) SPDIF receiver module. Up to 216kHz In.
8) SPDIF transmitter module. Pass thru.
9) SPDIF transmitter module. Out.
10) 3.5mm stereo receptacle. 2x analog inputs to 24-bit ADCs @ 96kHz.
IC's and Package Styles:
FPGA's: Xilinx XC6SLX9. 144-pin QFP.
FPGA 8Mb SPI FLASH (PROMs): Winbond W25Q80DV. 8-pin WSON.
Synchronous RAM's: GSI Tech GS8640Z18. 100-pin QFP.
Digital Audio Transceiver: PCM9211. 48-pin QFP.
330MHz VideoDAC: ADV7125. 48-pin QFP.
Programmable Oscillator: Si514. 6-pin 5x7mm.
Touchscreen Controller: SX8651. 12-pin DFN.
USB to UART: MCP2200. 20-pin QFN.
FAT16/32 SD Card Controller: CH376T. 20-pin SSOP.
256Mb (32MBx8) SPI FLASH: S25FL256S. 8-pin WSON.
Onboard Linear Voltage Regulators and Filtered A/V Powers:
1) 3.3V @5A: TPS75633. Main 3.3V Power derived from main 5V input.
2) 2.5V @1A: MCP1826: FPGA VCCAUX. Power derived from main 5V input.
3) 1.2V @1A: MCP1826: FPGA VCCINT. Power derived from main 5V input.
4) 5V for analog audio section of the digital audio transceiver is filtered from the main 5V input through a 500mA ferrite bead and ceramic cap's.
5) 3.3V for digital audio section of the digital audio transceiver is filtered from the main 3.3V power plane through a 500mA ferrite bead and ceramic cap's.
6) 3.3V for the videoDAC is also filtered from the main 3.3V power plane through another 500mA ferrite bead and ceramic cap's.
[schematic soon]
Design Challenges:
The very first challenge was trying to stack the RAMs. After placing 1 RAM on the bottom and flipping the 2nd RAM to go directly behind it on the opposite of the board, I quickly realized the pin layout of the SyncRAMs easily accommodated this setup. Just a few pins needed special attention by adding traces. The rest of the address lines and data lines just required vias to connect to the other address and data lines respectively, direct pin to pin lineup is not necessary.
The second challenge, after adding the digital audio transceiver was finding room to place the pass thru SPDIF module. Currently it is on the opposite side of the board as the USB connector. This will require me to shave down the pins of the module after soldering so that the USB connector can sit more flush to the board. I'll also have to insulate the bottom of the USB connector as it is metal.
The next challenges were getting the SPDIF control signals to the Master Spartan 6 and the analog L & R inputs wired up between the barrel jack connector and the digital audio transceiver IC. The constraints of using 4 layers and size of the board forced me to use wire wrap for the control signals and shielded analog cable for the analog inputs.
First Design Concept:
The Master Spartan 6 has 35 I/O lines of communication with the Slave Spartan 6. For my conceived design, the Master will send RGB data to the Slave along with HSync & VSync and Pixel Clk. That leaves 17 I/O lines for commands between the Master & Slave Spartan 6's.
The Slave will then send out the RGB to the 330MHz capable videoDAC. The Slave can also communicate with a keyboard or a Windows PC via USB. This video setup will allow not only multiple page flipping but also video overlay. The video overlay is a concept I've proven using 5 Parallel Video Boards. 3 boards seemed to be the realistic limit due to some video pixel noise created from back-plane connectivity between the boards @148.5MHz. That design had no ability for page flipping and I abandoned it. So in this current design there are 2 video sources, 1 per FPGA, merged into one board. Hardware graphics in the 'rear' plane while character plotting on the front from the Master and Slave hardware plotters will be the first goal.
More Design Concepts:
Not all the IC's need to be on the board in order for it to be functional.
For example, if one just wanted SPDIF functionality, only the SPDIF Transceiver and Master Spartan 6 would be needed with just a few supporting ICs (Oscillator, FPGA PROM, Voltage Regulators, etc).
Another possibility, since the keyboard interface and video output are done by the Slave Spartan 6, you could have a terminal? or maybe assembler? In addition, this would require at least 1 SyncRAM for video output and the videoDAC.
[more to add here]
NOTE: This is a work in progress. Look here for critical updates like pics, FPGA constraints, parts list, etc.
Block Diag made with yEd. Extended pics taken with Techsmith Snag-It.
EDIT (1/9/20): Added Digilent JTAG programming cable details.
The 4 layer board measures 2.5" (63.5mm) x 4.5" (144.3mm). It's a design that has evolved from past projects that have primarily focused on video. This new board can also display 1080p 16-bit 5-6-5 RGB video using a VGA connector, but now can also accommodate audio I/O.
There are 2 Spartan 6 FPGA's, each of which can control up to 2 4Mx18 250MHz NBT (No Bus Turnaround) SyncRAMs wired to form 8Mx18. [more to add here]
All IC's are powered by 3.3V with 5V needed for the Audio and USB. A rather tight voltage range of 5V-5.5V @5 amps is needed for the main power supply input. Close to 3 amps (max) are used by the SyncRAMs alone (@250MHz).
The I2C bus:
1) A programmable CMOS crystal oscillator with a frequency range of 100kHz to 212MHz. Boot address: $55
2) A resistive touchscreen controller. Boot address: $48
3) Digital audio transceiver. Boot address: $80
The SPI bus:
1) SD Card controller.
2) 256Mb FLASH.
I/O Connectors:
1) 2mm x 5.5mm 11Amp main power receptacle input.
2) 4 pin FFC connector for resistive touchscreen input.
3) VGA output.
4) JTAG for programming FPGA's. Digilent HS-1 Rev A JTAG programming cable is used. Digilent HS-2 & HS-3 are currently available.
5) USB for keyboard input, PC communication.
6) micro-SD card for storage, data exchange.
7) SPDIF receiver module. Up to 216kHz In.
8) SPDIF transmitter module. Pass thru.
9) SPDIF transmitter module. Out.
10) 3.5mm stereo receptacle. 2x analog inputs to 24-bit ADCs @ 96kHz.
IC's and Package Styles:
FPGA's: Xilinx XC6SLX9. 144-pin QFP.
FPGA 8Mb SPI FLASH (PROMs): Winbond W25Q80DV. 8-pin WSON.
Synchronous RAM's: GSI Tech GS8640Z18. 100-pin QFP.
Digital Audio Transceiver: PCM9211. 48-pin QFP.
330MHz VideoDAC: ADV7125. 48-pin QFP.
Programmable Oscillator: Si514. 6-pin 5x7mm.
Touchscreen Controller: SX8651. 12-pin DFN.
USB to UART: MCP2200. 20-pin QFN.
FAT16/32 SD Card Controller: CH376T. 20-pin SSOP.
256Mb (32MBx8) SPI FLASH: S25FL256S. 8-pin WSON.
Onboard Linear Voltage Regulators and Filtered A/V Powers:
1) 3.3V @5A: TPS75633. Main 3.3V Power derived from main 5V input.
2) 2.5V @1A: MCP1826: FPGA VCCAUX. Power derived from main 5V input.
3) 1.2V @1A: MCP1826: FPGA VCCINT. Power derived from main 5V input.
4) 5V for analog audio section of the digital audio transceiver is filtered from the main 5V input through a 500mA ferrite bead and ceramic cap's.
5) 3.3V for digital audio section of the digital audio transceiver is filtered from the main 3.3V power plane through a 500mA ferrite bead and ceramic cap's.
6) 3.3V for the videoDAC is also filtered from the main 3.3V power plane through another 500mA ferrite bead and ceramic cap's.
[schematic soon]
Design Challenges:
The very first challenge was trying to stack the RAMs. After placing 1 RAM on the bottom and flipping the 2nd RAM to go directly behind it on the opposite of the board, I quickly realized the pin layout of the SyncRAMs easily accommodated this setup. Just a few pins needed special attention by adding traces. The rest of the address lines and data lines just required vias to connect to the other address and data lines respectively, direct pin to pin lineup is not necessary.
The second challenge, after adding the digital audio transceiver was finding room to place the pass thru SPDIF module. Currently it is on the opposite side of the board as the USB connector. This will require me to shave down the pins of the module after soldering so that the USB connector can sit more flush to the board. I'll also have to insulate the bottom of the USB connector as it is metal.
The next challenges were getting the SPDIF control signals to the Master Spartan 6 and the analog L & R inputs wired up between the barrel jack connector and the digital audio transceiver IC. The constraints of using 4 layers and size of the board forced me to use wire wrap for the control signals and shielded analog cable for the analog inputs.
First Design Concept:
The Master Spartan 6 has 35 I/O lines of communication with the Slave Spartan 6. For my conceived design, the Master will send RGB data to the Slave along with HSync & VSync and Pixel Clk. That leaves 17 I/O lines for commands between the Master & Slave Spartan 6's.
The Slave will then send out the RGB to the 330MHz capable videoDAC. The Slave can also communicate with a keyboard or a Windows PC via USB. This video setup will allow not only multiple page flipping but also video overlay. The video overlay is a concept I've proven using 5 Parallel Video Boards. 3 boards seemed to be the realistic limit due to some video pixel noise created from back-plane connectivity between the boards @148.5MHz. That design had no ability for page flipping and I abandoned it. So in this current design there are 2 video sources, 1 per FPGA, merged into one board. Hardware graphics in the 'rear' plane while character plotting on the front from the Master and Slave hardware plotters will be the first goal.
More Design Concepts:
Not all the IC's need to be on the board in order for it to be functional.
For example, if one just wanted SPDIF functionality, only the SPDIF Transceiver and Master Spartan 6 would be needed with just a few supporting ICs (Oscillator, FPGA PROM, Voltage Regulators, etc).
Another possibility, since the keyboard interface and video output are done by the Slave Spartan 6, you could have a terminal? or maybe assembler? In addition, this would require at least 1 SyncRAM for video output and the videoDAC.
[more to add here]
NOTE: This is a work in progress. Look here for critical updates like pics, FPGA constraints, parts list, etc.
Block Diag made with yEd. Extended pics taken with Techsmith Snag-It.
EDIT (1/9/20): Added Digilent JTAG programming cable details.