6502.org

Hi!
I have a few not used ATF16V8B-15PC chips.
I'm wondering, whether one chip capacity is sufficient for the implementation of the addresses decoder of simple SBC. 'Simple' - this is roughly one ROM chip, one RAM, two 6522 and two 6551.
And I'm wondering too, whether there is in the internet DIY-friendly guide for the entire process of logic device creation, from truth table to ready to use programmed PLD chip. It would be interesting to read.
Does anyone here have mastered this science ?
Or, may be, it is not available for ordinary mortals?
Thank you in advance.

The quick answer is yes. You can use a SPLD for memory decoding on a basic system. You can look at WinCUPL for creating the logic code. The ATF SPLD's are not as easy to program as their Lattice counterparts, but at lease one person here has offered to help program them.

For a quick example, look at my DEC-1 decoder. it uses a slightly larger device, but could be scaled down to the 16x8 chips.

http://sbc.rictor.org/decoder.html

You can also search this forum for WinCUPL, GAL, and 22V10 to find other relevant discussions.

Daryl

Note also that you can do the whole job with a single 14-pin 74xx00 quad NAND gate IC and have one gate left over for something else. Chapter 2 of the 6502 primer, the address-decoding page, shows how, at http://wilsonminesco.com/6502primer/addr_decoding.html . The first diagram near the very top of the page of chapter 22, the circuit potpourri page, shows a diagram of a whole computer using this kind of decoding, at http://wilsonminesco.com/6502primer/potpourri.html . That one shows only one 6522 and no 6551's, but you can expand it all the way to ten such I/O ICs with no additional logic, per the earlier page.

Thanks. I'll read and try to learn PLD.

Learning PLDs is always a good thing; but again, you don't need it for what you're talking about. The 74AC00 does the whole job and even saves board space.

Please follow Garth's advice and start simple. What you are interested in building doesn't require the overkill of programmable logic.

Learning PLDs is anyway good thing. Let it to be a separate goal.
In the future I would like to play with BBC Basic, that supposes certain memory map. Do I need to copy the memory map of Beeb? At least RAM and ROM locations? I believe, yes, besides I/O...

The BBC's memory map is mostly dictated to by the 6502's requirements anyway. You need RAM low for zero page and the stack and ROM high for the vectors. Where the I/O goes, and what I/O is available is up to you, the BASIC rom relies on the well defined OS vectors for everything.

The normal 16k Basic ROM is assembled to run at 08000 to 0BFFF, and you'll need an OS that has the OS and hardware vectors in the 0FF00-0FFFF range. That suggests that you'd want 32k RAM in the 00000 to 07FFF then the basic ROM, then any I/O, followed the OS to the top of the memory space, how the 0C000 to 0FFFF area is split is up to you.

Something like 32k RAM, 16k basic ROM, 8k I/O, 8k OS ROM would be easily within the capabilities of a 16V8, and not that complex with 74 series logic.

I like this map, I'll try so, with 74HC logic. 8k for DIY OS is pretty enough. Thanks.

@Vladimir

Welcome aboard!

Please take no offense, but I was under the impression that many computers in the former Soviet area were Z80 based? Especially considering all of the ZX Spectrum clones.

Is the 6502 a popular system in Russia?

Hi!
The first widespread DIY computer in the USSR was 8080 based Radio-86RK from "Radio" magazine (#6/1986). I also made that one.
The nineties were the era of ZX-clones, Z80, soldering, porting of games from tape to floppy.
6502 is virtually unknown in our country. There was only one 6502 based computer, "Agat", a clone of Apple. But, it came late and did not spread.
There was a small group of people involved in the NES games, but, IMO, for now all this goes on recession.
Recently, I came across one russian website, a man is making a 6502 SBC. It hooked me too. I would like to make something like a workbench computer with many interfaces.
That's it.

Hi Vladimir,

if you want to use a GAL as decoder then you need a decent programmer that supports the devices you plan to use. Especially the ATMEL devices use a proprietary algorithm only very few programmers support. The cheapest programmer I'm aware of that supports the ATF16V8 and the others is the Wellon VP-290.
As a start you can use Daryls sample decoder. To fit it into a ATF16V8 you can omit A4,5,6,7 and create only one IO signal that is asserted for one 256 byte page. As you intend to use only 65xx peripherals you can make use of the second chip select that is active high. The active low chip select of your 4 IO devices are then all connected to the IO from the GAL and the active high chip select is then connected to A4 A5 A6 and A7 respectively. If for example your IO page is at lets say $E0xx then this scheme will select only one device for the addresses $E01x, $E02x, $E04x and $E08x. Other addresses in the IO page must not be used!
I don't think that starting with a GAL makes it more difficult. Just post your design and then I'll have a look at it.
I recommend that you use the WinCUPL software, it requires an old Windows (XP or 7). But you can use it also for designs of GALs from other vendors, the fuse map of GALs is not vendor specific.

Cheers Peter

Hi Peter.
I take note of your advice , thank you.
For now, I am studying the works of Garth Wilson, Daryl Rictor and forum stuff.
Meanwhile I'm waiting the arrival of the microprocessor from China. 65C22 and 65C51 are already arrived. Ordering parts, I did not think about the frequency range. It turned out that 65C22 are 1 MHz, but 65C51 are 2 MHZ. Maybe I need the wait states for 65C22. Isn't it? It may be a feature of addresses decoder, as it is in Daryl's example. System clock will be about 1,8 MHz. What do you think about it?

The best is to start with a system that has no wait states. It is very difficult to debug problems related with the wait state generator without the appropriate tools, aka logic analyzer. The easiest path would be to create a system with everything running at 1MHz and add a wait state generator later.

For faster systems I always use the CDP65C51AE4, a 4 MHz 65C51, and the WDC 65C22 (supports 14MHz) together with the WDC 65C816 or 02. I'm a little bit surprised that your 65C22 is only a 1MHz version. Typically the Chinese shops all have 2MHz versions and a lot have the 4MHz version for very decent prices. I would say getting faster devices is easier than using a wait state generator, especially if you intend to run your system with 1.8MHz, then even EEPROMs and EPROMs are not a problem as they are readily available with access time down to 90ns.

Btw. what brand and speed rate of CPU did you order?

Cheers

Peter

I bought at the following pricec (shipment included):
R65C22P = $7.5 for 2 pcs.
R65C51P2 = $7.5 for 4 pcs.
W65C02S8P-10 = $3.6 for 1 pcs.
Shipped as not used, but appearance of pins says the opposite
Is it too expensive?
I can order other 65c22... What is a resonable price? Wich brand do you advise?
Related Wellon VP-290. $160 +$20 shipment is Kanga price. The Chinese sell for $120, shipment included. Advice?
Related RAM/ROM. There is in my treasury a huge heap of old chips from 386 and 486 systems. I believe, that is pretty enough.
Related system clock. I have ready to use 1.8432 MHz generator, suitable for system clock and 6551 simultaneously.
I believe, it is nice.

P.S. What is in the forum member profile the 'Ocupation' item? Job or hobby? I doubt.