Every 6502 system needs some kind of memory decode, and there are several options with various tradeoffs. If I can, I'd like to summarise some options here, with links where possible - please comment so I can update this post with the best information. (I won't get into choosing among the several 74 series families, it's covered elsewhere.)
- Very few TTL gates like Garth's 3-gate single chip decode which splits memory into four 16k blocks - I/O devices can each decode a single address bit so you can have up to 10 devices in the 16k I/O block, if each has a CS and a \CS pin.
- The obvious but slowish 3-to-8 decoder 74*138 divides memory into 8 blocks of 8k, two of them cascaded gives finer granularity but double the propagation delay. Or the 4-to-16 decode 74*154 for a finer split.
- A magnitude comparator like the 4-bit 74*85 or 8-bit 74*688 or 74*521. [Is this preferable to a 138 in some ways?]
- preprogrammed logic such as PAL or GAL (e.g. Daryl's standard part gives one page of I/O, nearly 32k of RAM and a full 32k of ROM. Edit: Daryl also offers custom configurations - see below.)
- your own PAL or GAL, for similar granularity but however you want it, once you've got the capability to program such a device.
- programmable logic such as CPLD or FPGA for pretty much any scheme you care to code, once you've set up the tools and the programming dongle.
(In all cases, add a latch or VIA to add banking. I think that's probably another topic.)
Memory decoding options
Memory decoding options
Last edited by BigEd on Mon Apr 04, 2016 7:28 am, edited 2 times in total.
- GARTHWILSON
- Posts: 8777
- Joined: 30 Aug 2002
- Location: Southern California
- Contact:
Re: Memory decoding options
BigEd wrote:
Or the 4-to-16 decode 74*154 for a finer split.
For myself and others who may have an aversion to modern programmable logic due to factors like 5V versions disappearing, the near requirement for Windows, the cost of a programmer, and that the program is not guaranteed to last even half the number of years I've already been using my current workbench computer, Jeff has gotten me thinking along the lines of making a very small "programmable" logic board that's programmable with a soldering iron. PCBs getting super cheap for hobbyists (for example http://www.dirtypcbs.com/, http://www.pcbway.com/, and http://pcbshopper.com/), and 74LVC1G__ tiny SMT logic building blocks are available with delays under 2ns(!) for even gate pairs. It is becoming feasible to make postage-stamp-sized modules that could be "programmed" with solder blobs on tiny split circles on the PCB, and/or by soldering wire-wrap wire jumpers into .015" holes. It's re-programmable too, not having to cut traces to program it. With greater difficulty, the tiny 6-pin SMT gates could be changed out. (Jeff's post that got my imagination going is here.)
Quote:
- A magnitude comparator like the 4-bit 74*85 or 8-bit 74*688 or 74*521. [Is this preferable to a 138 in some ways?]
http://WilsonMinesCo.com/ lots of 6502 resources
The "second front page" is http://wilsonminesco.com/links.html .
What's an additional VIA among friends, anyhow?
The "second front page" is http://wilsonminesco.com/links.html .
What's an additional VIA among friends, anyhow?
- BigDumbDinosaur
- Posts: 9431
- Joined: 28 May 2009
- Location: Midwestern USA (JB Pritzker’s dystopia)
- Contact:
Re: Memory decoding options
GARTHWILSON wrote:
...and 74LVC1G__ tiny SMT logic building blocks...
x86? We ain't got no x86. We don't NEED no stinking x86!
- GARTHWILSON
- Posts: 8777
- Joined: 30 Aug 2002
- Location: Southern California
- Contact:
Re: Memory decoding options
BigDumbDinosaur wrote:
GARTHWILSON wrote:
...and 74LVC1G__ tiny SMT logic building blocks...
http://WilsonMinesCo.com/ lots of 6502 resources
The "second front page" is http://wilsonminesco.com/links.html .
What's an additional VIA among friends, anyhow?
The "second front page" is http://wilsonminesco.com/links.html .
What's an additional VIA among friends, anyhow?
Re: Memory decoding options
BigEd wrote:
...
- preprogrammed logic such as PAL or GAL (e.g. Daryl's gives one page of I/O, nearly 32k of RAM and a full 32k of ROM.)
- preprogrammed logic such as PAL or GAL (e.g. Daryl's gives one page of I/O, nearly 32k of RAM and a full 32k of ROM.)
I have an open offer to help program the Lattice GAL22V10D's with any kind of decoding that can be squeezed into it. I do not charge for the programming and am happy to help with the required WinCUPL code. I can either sell the 22V10 at my cost plus shipping to the end user, or they can send me their chips with return postage and I'll program and return them.
I have done so for several users. Most want the IO in a different page, or different granularity of decoding.
For everyone reading this - I cannot program the Atmel devices and I believe the current 22V10's available online as "Lattice" parts are actually Chinese "copies". They do work and I have not had any issues with them... I am just trying to give full disclosure up front. Lattice stopped making the GAL's several years ago.
Daryl
Please visit my website -> https://sbc.rictor.org/
Re: Memory decoding options
Even better - thanks for the note and thanks for the service to the community!
- BigDumbDinosaur
- Posts: 9431
- Joined: 28 May 2009
- Location: Midwestern USA (JB Pritzker’s dystopia)
- Contact:
Re: Memory decoding options
8BIT wrote:
I have an open offer to help program the Lattice GAL22V10D's with any kind of decoding that can be squeezed into it...For everyone reading this - I cannot program the Atmel devices and I believe the current 22V10's available online as "Lattice" parts are actually Chinese "copies".
I am using the PLCC44 version of the ATF1504AS in POC V2 (which will get built as soon as I resolve my vision issues) and although I maxxed out the pin usage in my design, I wasn't even close to maxxing out the 1504's logic capabilities. As the available sources for GALs dry up small CPLDs such as the ATF1504AS are increasingly viable alternatives, offering far more logic functions and I/O pins than any GAL. The ATF15xx series offers 7.5ns or 10ns pin-to-pin prop time, so glue logic delays generally will not be a factor in a well-designed 65C02 or 65C816 circuit.
I have here the Atmel test rig for those devices, as well as adapters for several different device packages, including PLCC44 and PLCC84. If you send me your CUPL source code or a properly formatted JEDEC fuse map I can program a device for you. I can also furnish a device, which will be at our cost plus whatever shipping/postage is required to get it to your location.
x86? We ain't got no x86. We don't NEED no stinking x86!
Re: Memory decoding options
Nice one BDD!