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From a programming standpoint, what are the advantages of the 65c02? Are there any special tricks you can do on the newer chip that aren't possible on the older one?

I may have mentioned this before, but there is an instruction table at http://www.defence-force.org/computing/ ... /annexe_2/. This table also indicates what processor architectures (6502, 65c02, 65816) support each instruction (and addressing mode).

There's also a more compact table at http://www.llx.com/~nparker/a2/opcodes.html.

Thanks for the information, it's been fun reading through it all.

To add to Garth's list, the most useful feature for me was the unindexed zero page indirect mode, which meant you could write: instead of having to do (and preserve Y where necessary).

The 65C02 also addresses an NMOS "feature" that has bitten more than a few assembly language programmers. If the NMOS 6502 (6510, 8502, etc.) is operating in decimal mode when an interrupt is processed, it will remain in decimal mode, with possibly undefined results within the interrupt handler. The 65C02 clears decimal mode when an interrupt is processed, eliminating a potential programming booby trap.

My opinion is that there is absolutely no earthly reason to use the NMOS hardware for any new design. The 65C02 and 65C816 address a number of errata present in the NMOS parts and also support higher clock speeds (officially up to 14 MHz). In fact, for a new design, I recommend starting with the 65C816, which can be run in 8 bit emulation mode until one gets sufficiently familiar with it to switch to native mode.

The normal thing to do in NMOS 6502 interrupt-service routines was to start it with CLD, which unfortunately increases the interrupt overhead, along with having to put X and Y through A to push them.


I might go even further, and say that unless you're running legacy '02 code, there may no reason not to just put the '816 in native mode immediately in the reset routine and leave it there permanently.


Definitely another valuable one. I couldn't think of them all at once when I was writing.

A clock cycle here and a clock cycle there...and before you know it, you're into some serious processing time. (A paraphrase of something said at a U.S. congressional hearing about cost overruns in the space program.)
My only caveat for the first-time builder is that the '816 native mode interrupt handlers are potentially more complicated, depending on what is being accomplished. For the purposes of debugging the hardware, remaining in emulation mode may make things a little easier.
In the '816, stack pointer relative addressing modes and the stack push instructions PEA, PEI and PER are quite useful, even in emulation mode. I hasten to add that a 65C816 newbie doesn't have to use any of that stuff, and can stick with the basic 6502 instruction set while getting to know the processor. However, once the programmer does gain familiarity, he'll wonder how he ever got along without the new instructions.

Be warned that once you start with the 65c02, there is no going back. After using BRA, PHX, and STZ for a while, you won't want to miss them.

I find myself using other types of branches (such as bcc, bcs, bne, beq or whathever) as "branch always", because it's common that one of the flags will be predictable at some place, and then I just add "branch always" in the commants to make it clear. Of course, whenever you actually can't predict anything and have to use jmp, bra is probably useful to save a byte, but it's not the end of the world if you don't have it.

However, I can't comment about the others, as they sound quite useful. However, INC A and DEC A are probably the 65c02 instructions that are the most missing in the original instruction set, because CLC ADC #01 or SEC SBC #01 is terribly annoying, 3 bytes just to increment/decrement.

The ability to push and pull .X and .Y without clobbering .A is invaluable.