6502.org

Hello!
I am currently building a 65c02 computer, and have an odd problem. The JMP and JSR opcodes, instead of jumping to the correct locations in memory, will often jump to a random address. I have not experienced this with any other operation. The bug occurs frequently and I have yet to find a reason or a solution for it. Anyone have an idea?
The model of CPU is the W65C02S6TPG-14. The computer is constructed on breadboards, with a CY7C199-35PC 32K SRAM IC directly connected to address lines 0 to 14. My code runs fine in multiple 6502 emulators, just a simple jump back to $0000.
Thank you in advance,
John

Are all the other instructions working right? What kind of construction? I ask because this processor's edges may be too fast for especially the solderless breadboards.

Construction is on a solderless breadboard, about 3 of them all packed together. I'm using telephone wire for jumpers. I haven't tried all of the other instructions, but NOP and BRK work fine. The computer is being single-stepped.

I've never heard of a problem like that, but solderless breadboards are the worst of all worlds for this kind of thing. Still, if you have a clean clock signal and the phase 0 input is connected with very short wires to the clock source, ie, no flying or bundled wires, it should still work, especially if you mean you are single-cycling it. Otherwise the wires act as inductors and antennas talking to each other and edges from other wires will couple into the clock input causing unwanted extra triggering. This kind of construction also makes for a ton of groundbounce that has a similar effect. The page entitled, Construction: Avoiding AC-Performance Problems in the 6502 Primer should be a good guide, and has links to more. I wouldn't rule out that your problem is something entirely different, but encouraging beginning builders to get off to a better start can prevent a lot of frustration for them.

How are you implementing the single step ? If there are glitches on the clock, that could cause some problems.

What's the clock speed?

I did mean single-cycled, sorry about that. The clock is a monostable multivibrator made from a 555 timer with a transistor to invert the signal. Before the computer had its RAM, I directly wired the data lines to NOP, and the clock didn't have any issues advancing through memory. Also, I noticed something else with the issue: the longer I wait between cycles, the more likely the bug is to occur.

Will the clock edges be adequately fast? Both JMP and JSR have to route the final operand byte (the MSB) direct from the data bus at the close of the final cycle out to the address bus at the beginning of the next cycle. Is the MSB corrupt, or both bytes of the address? Has any other opcode with an operand worked?

I don't have an oscilliscope yet, so I don't know. Also, I looked and saw that this also occurs with NOP. It seems that if I wait in the first cycle of the instruction, the next address will be incorrect. I'm still probing the JMPs, though.

Ah, that's good, if it's not just JMP - less mysterious!

Okay, new data with JMP. I put a jump to $0000 at address $0000 and put a few dozen NOPs behind that. When I cycled through it, it got to the high-order byte of the JMP command. Then, the address lines went blank for ~3 cycles or so before resuming at the next NOP instruction, appearing to have just skipped the jump. I'm thinking that before, when I wasn't using a NOP buffer after the instruction, it would reach the next instruction (BRK or some other, random opcode - i didn't clear the entire RAM space) and would produce the odd results. I still don't really know.

By blank do you mean zero?

I don't know. Because the monitor is in between the RAM and the 65c02, I would assume so.

The monitor is 16 LEDs in a DIP package, to be specific.

Do you have current-limiting resistors on the LEDs?