This is a very nice project! In effect, it delivers a software-defined 6502. Anyone wishing for a few
extra instructions can just(*) code them up in C - no HDL required.
(Edit: As Chris' repo link no longer works, see
my fork for reference.)
As Konrad points out, this platform surely has room for higher performance if that's really important -
this forum topic is the one to watch for 'core6502' progress.
Also, cjb pointed out
elsewhere the possibility of adding lots of RAM:
cjb wrote:
The STM32F and STM32L (at least) have what's called a 'Flexible Static Memory Controller' (aka FSMC), that among other features, can remap 42 GPIO pins into A[0:25] & D[0:15] as a memory bus to external SRAMs, and the ram then appears as up to 1GB of normal directly-addressable memory.
Friends of mine are pushing for a 65816 simulator next
![Smile :)](./images/smilies/icon_smile.gif)
... I'm thinking for that there's the 512kB SRAMs (like
http://tinyurl.com/6oeqknl), which can go onto a simple pin-to-pin daughterboard that sits under the Disco.
(lib65816 might be a basis for that - but just adding load and store from
columns 7 and f for use in the 'emulation mode' would go a long way.)
Almost all the pins are 5V-tolerant, but only powered from a 3 supply. (That's possibly the cause of my present trouble with the serial connectivity)
If the Discovery board is altogether too pre-packaged then the
chip itself is surface mount LQFP100 (0.5mm pitch) and can run from an 8MHz crystal (or an onchip 16MHz oscillator?)
The chip has a collection of interface blocks on it, so the usual collection of i/o on an external bus mightn't be needed. There's multiplexing down to the 100 pins, so not all interfaces are available in all combinations.
(*)May be considerable work, depending on the instructions, but this ARM has hardware floating point, so that's promising.