6502.org

Is it possible to do parallel processing with 6502s?

I have a Rockwell databook from 1984 or so that has advance information on a part (6529?) with two '02 cores operating out of phase. That would have been a fun part. Anybody know if these saw the light of day?

-Dave

I wrote some multi-processor code.. sort-of.

On an SNES program, I had 2 CPUs doing distinct parts of the same task. In this case, it was necessary. The main CPU (a 65816) was running music playing code that results in about 16 bytes of data (control data for a synth).

Then it would sync with the co-CPU that controls the sound in that system (it's very similar to a 6502, but with MOV instead LDx), transfer those bytes, and I had the co-CPU decode that data and translate it to the right format for the soundchip.

This way of doing I guess would be good if you're doing something that can be broken cleanly into distinct tasks like that. It's more like writing 2 seperate programs.. maybe not what you have in mind.

BTW, about simulating dual-port RAM, there've been some interesting posts about that on the nesdev forum:
http://nesdev.parodius.com/cgi-bin/wwwt ... b=#Post802

Common memory shared with multipel processors sort of urinates me off as I have to deal with this arcade game called Galaga whihc uses 3 seperate Z80s tied into a single 2K RAM memory which is a common memory for both.
The system is amazingly touchy and likes to use capacitor delays for critical RAM timing. I designed an adapter to help out with the one issue, but overall, I think of it as a fairly lousy design.

If one were to do multiple CPUs, I WOULD like to esee each cPU have its own RAM and RO:M system for their tasks, and the coomon RAM to be used to commands and data rather than critical zero page and internal variables for the CPUs. This way also, if any of the processors drop out, it doesnt drive the entire system crazy. You can put in code to handle such events.

So kinda sorta like a beowulf cluster (i.e mutiple computers hooked up to make one big one). Thats an easier way to do parallel processing in my opinion, since each processor has its own ram and rom. Although the idea of a shared common ram is sorta beyond me at the moment.

Hey ya'll... I had a thought on this... could the 6522's be used as the interface for multiple cpu's? Like just jerryrigging a connection between a two or more 6522's and it would almost be like connecting two computer via a serial port or the like right?
Lyos Gemini Norezel

Ye... I know... but for me the term "jerryrigging" is used for anything built by amatures and not by factories or the like.
Lyos Gemini Norezel

This is, in fact, the reason the original 6821 PIA chip had the serial port to begin with, which the 6522 and 6526 chips inherited.

--
Samuel A. Falvo II

Hallo Dave,


> Anybody know if these saw the light of day?

The old IEEE Commodore drives used either one 6502 and one 6504 or two 6502's, running in the way you described.

Many years back, I added a second processor to an Acorn Atom, running on the oposite phase of the clock. It can work, but the timing becomes much more critical, even at 2MHz! The two processors shared the ROMs and an 8k block of RAM used for inter-processor communications, while each having their own 32k of RAM for running programs. I managed to get both processors runing seperate BASIC programs using the same BASIC ROM.

I never really got into splitting a single task between the two processors, though. I mainly used the second CPU for calculating mandelbrot images in the background while I used the computer for something else (mainly space invaders )

I wouldn't like to add more processors in this way, though. I suspect it would be better to add some sort of network if you want to use multiple processors.

Yeah, Commodore's PET-series disk drive units relied on twin processors. I'm not sure if the Commodore VIC-series (e.g., the 1540 through 1581) did or not though.

That being said, "SMP" (since it's basically what it is) is actually the simplest possible method of multiprocessing, since you don't need to invent a network system either. Realistically speaking, 4 CPUs is about as far as you can push a typical bus (at least with Intel and PowerPC processors); beyond that, performance starts to dwindle fast. I suspect 2 CPUs is the limit for the 6502/65816 because of its lack of cache memory and very high bus bandwidth requirements.

That being said, one can combine the benefits of SMP and networked designs by building networked clusters of twin-processor nodes, if required.

For me, if I were to go multiple cpus, I would go with the common ram and each cpu while it has its own rom/ram would access the common ram in a round robin fashion. Each one can simply have data or programs passed back and forth with a token id for memory, or the ram can segment for each cpu.

That's a form of networking.