6502.org

Hallo allemaal,

I'm busy revising my TTL6502 project, http://www.baltissen.org/newhtm/ttl6502.htm. The original idea was to build a 6502 only TTL ICs. But I soon found out that that was undoable from a practical point of view: the Instruction decoder and the ALU were the trouble makers. So I decided to cheat a bit and to use FlashRAMs.
To handle 8-bit operations I would need a FlashRAM with at least 24 inputs. Not having them I decided to cascade two, each handling four bits. But that idea comes with a penalty: the access time of the ALU is 140 ns. This means I can only emulate the 6502 up to 3 MHz.

During the revision I thought about expanding the 6502 a bit with, for example, 16-bits registers. Only after weeks I realised that I needed a 16-bits ALU as well. Using FlashRAMs means a 280 ns. access time, meaning I can forget 2 MHz operations

My question: has anybody a better idea?

Many thanks in advance!

Ruud, it might be best to just post a link to the same post you put in "Programmable logic" (there-- I just did!) so the replies are kept all in one place and are more helpful as each person replying sees everything that was already written. If you like, I think the new forum software allows us to move the topic if it was not in the best section for the subject matter.

When writing this post, my son came downstairs to tell me he had a virus on his PC. I know that I finished it. But when I looked this morning, I couldn't find it anywhere! So I wrote a new one. And when I submitted that one, I was quite sure I hadn't seen the usual screens yesterday thus believing that, although having finished it, I hadn't submitted it.

I'm sorry for any inconvenience!

And in turn I was briefly confused to see Garth's reply but no sign of my own half-baked contribution!

It doesn't sound like you're familiar with bit-slice processors.

It will take much fewer chips to build a 16-bit ALU using something like an AM2901 bit-slice ALU.

Toshi

As part of my Computer Architecture class i had a lab in which i had to program the Intel 3002 bit-slice cpu. I had a ms-dos program for doing that, but it is in croatian... This kind of cpu may be microprogrammed in any way, but than again, this is like cheating(if you want to build your own alu)...

You can use an Am2901 inn a pipelined design.

The ALU doesn't care if the design is pipelined or microcoded.

Toshi

Couldn't find the datasheet. And I found out it is almost 40 years old ???? Is it still available?
Located a datasheet and:
- I wondered if it could emulate the complete ALU of the 6502
- propagation delays up to 90ns.! In that case a 70 ns. FlashRAM is faster.

Thanks anyway for your response!

There's also the 74<mumblemumble>181 and '182 chips; it is possible that these may be available in a logic family that gives you the performance you require. There also appears to be something called the '381 and '382.

The intel3002 (the intel3001 is the control chip) datasheet: http://www.cpu-zone.com/3002/intel3002.pdf

You may buy it here: http://www.ebay.com/sch/i.html?_trkparm ... p=15&_sc=1

As for the 181, i recently purchased 3x form ebay:http://www.ebay.com/sch/i.html?_nkw=74l ... m270.l1313

I have some 181's but they don't cover the BCD mode.

But the solution for my problem is quite simple. When I run in 6502 mode, I only need the 8-bits part of the ALU and so I still can run the wanted 2 (even 3) MHz. But my 16-bits mode won't be compatible with the 65816 anyway so there is no objection against inserting a "wait state" when the ALU is needed. Problem solved

We have an incredible warehouse of info on this website, and my attention was just brought to something I didn't realize was there, from Dieter Mueler:
ALU design index, including NMOS 6502 ALU
Trex experimental 32 Bit TTL RISC CPU (I think I saw it before on his old website.)

A couple of his projects are shown here.

First, his M02 home-made 6502 made from standard parts, 74LSxxx, 27C512 EPROMs, and a fast SRAM from an old 80386 motherboard:


then the 32-bit TTL RISC CPU (the sandwich is three boards thick, in a 6U Eurocard size):

Although it works great indeed, I have one objection against this design: it doesn't emulate the 6502 internally. It is in fact a little TTL computer running at X MHz that simulates what the 6502 does at 1 MHz. My design is meant to run on the clock it is fed with.

But again: still all respect for his solution!

Somewhat related, although not tackling BCD, 'lateblt' has an article about a TTL design of a 6502 ALU which goes into some detail about the datapath here:
http://lateblt.livejournal.com/87418.html

Mike just posted Dieter's updates, at http://6502.org/users/dieter/index.htm .