For example the iCE40 up5k is a small FPGA with 128kB of SRAM (in addition to the 15kB of embedded RAM). The Upduino board is US$7.99 plus shipping, so this is really cheap. I made a 6502 computer at 12.5MHz with VGA output, 64kB of main RAM plus 64kB of video RAM, 256 bytes of boot ROM, serial, PS/2 keyboard and using the included SPI flash for program storage, all using one third of the available FPGA resources
Nice! I originally started my 65F02 concept around the iCE40, since it is cheap and small, and comes in an easily soldered package. But synthesizing Arlet's core for it suggested that the iCE40 architecture would be slower than what I was looking for; so I am actually reassured that you got to similar speeds in a real-world test.
Yes, the up5k is a slow FPGA, you can't reach very high speeds in the 6502 core.
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Your design including the RAM is about as fast as I got with the CPU core only, if I recall correctly. So the routing penalty to access the RAM seems smaller than in the Spartan-6, probably because the RAM is not as scattered across the chip? (Or is it because any routing delays are dominated by logic/switching delays anyway?)
I'm running the P&R with constraints in the two clocks: VGA clock (25.2 MHz) and CPU clock (12.6 MHz), the output of nextpnr is:
Info: Max frequency for clock 'clk25': 28.02 MHz (PASS at 25.18 MHz)
Info: Max frequency for clock 'sys1.cpu_clk_$glb_clk': 16.54 MHz (PASS at 12.60 MHz)
So, I have slack in both clocks. The SRAM in the iCE40 is at the boundary, so you have to cross throw the chip to access it, but it has a fast access time of about 7ns (and 70MHz cycle time).
If you want more RAM, Xilinx's website tells me that there's a Spartan 7 in the same package with 45 BRAMs of 36Kb each. And if you can cope with 0.5mm ball pitch, there's an Artix in a (physically) smaller package with 75 of them. That's 180KB and 300KB respectively. They're not exactly cheap (especially the Artix). And I imagine the 65F02 would require extensive tweaking to get the most out of them.
I have looked at the XC7S25, and even installed Vivado to play with it. Besides the higher price, availability of the faster speed grade parts scared me off: Mouser has a few of them on the shelf, but already knows that the next batch will only arrive in spring of 2021. That's a loong lead time for an active part... And the Spartan-7 requires three instead of two different supply voltages for Core, Aux and I/O, which I found a bit annoying.
Unfortunately 0.5 mm pitch seems out of reach when using the low-cost PCB houses. Their design rules (5 mil trace/gap, 0.4 mm via annulus) don't allow traces or vias to be fitted between the pads. A pity, since that limits the choice of FPGAs quite a bit. On the other hand it's amazing how far the low-cost capabilities have evolved over the past few years. And my own capabilities in hand-placing and pizza-oven-soldering might not be adequate for 0.5 mm BGAs anyway...
