W65C02S RDY / BE pins & first build advice

[Paganini]

BigEd wrote:

I think Dave Jones has done this - maybe this video, where he traces a Gigatron built two ways:
EEVblog #1176 - 2 Layer vs 4 Layer PCB EMC TESTED!

Quote:

What difference does a 4 layer PCB make to EMC radiated emissions compared to an identical 2 layer PCB? And why?

Dave does H-Field near-field probe testing on two otherwise identical PCB's.

Edit: Amusingly, it's excerpted here, as Dave himself was searching for it in his own content.

LOL! Thanks Ed. That's a great video, but not the one I was thinking of. In it, there was a machine that could visualize the current, so you could actually see the signal making its way towards the receiver, and the return current instantly following the signal as it worked its way through the trace.

[Osric]

Paganini wrote:

GARTHWILSON wrote:

If you can also do a relatively fine Vcc grid too, all the better.

Hi Garth! I am curious about this one. We tend to place more emphasis on the quality of the ground return network than on Vcc. Why is that? I was reading Dr. Howard Johnson the other day, and came across this:

Quote:

(1) When the driver switches HI the return current (transient and DC) must re-enter the driver through its power pin. When the driver switches LO the return current must re-enter the driver through its ground pin.

This suggests to me that the Vcc network should be just as important as the GND network. Why isn't it?

According to AN-147 from Renesas by Stanley Hronik:

Quote:

Ground Bounce levels are typically more pronounced than Vcc Bounce levels because of the HIGH to LOW transition is trying to quickly bring a HIGH signal down to a narrow window of <400mV for a logic LOW. A low output impedance is required to complete the transition quickly. In the LOW to HIGH, the only requirement is that the output be above 2.4V. 5V is available as a driving voltage. A much lower pull up impedance is required to make the transition quickly.

Application note also attached in case it goes away.

[Osric]

Paganini wrote:

Hmm. I replied to this thread yesterday morning, but the toobz seem to have eaten it! Anyway, here (again) is a direct link to the All About Circuits online textbook: https://www.allaboutcircuits.com/textbook/

And here is a link to an article that seems pertinent to this thread: https://www.allaboutcircuits.com/techni ... impedance/

Thanks! In case other people might find it useful here is a link to the same content in PDF form:

https://www.ibiblio.org/kuphaldt/electricCircuits/

It isn't clear what form Kuphaldt intends the reader to consume the work in.

The article was also good, the animation of transmission line effects is particularly cute, and I feel it matches with my evolving understanding. I seem to have a problem where I am saying/thinking "the past of least inductance" rather than "the path of least impedance" and I still need to get these terms straight in my mind. It at least corresponds with my model that an important part is the empty space between the signal carrying line and possible return paths / other unrelated conductors. I'm not yet clear on the whole idea and will need time to get comfortable with the idea that impedance = resistance in ohms + reactance in ohms * j (that is, impedance as a complex number like 100Ω + j50Ω).

[GARTHWILSON]

Paganini wrote:

GARTHWILSON wrote:

If you can also do a relatively fine Vcc grid too, all the better.

Hi Garth! I am curious about this one. We tend to place more emphasis on the quality of the ground return network than on Vcc. Why is that? I was reading Dr. Howard Johnson the other day, and came across this:

Quote:

(1) When the driver switches HI the return current (transient and DC) must re-enter the driver through its power pin. When the driver switches LO the return current must re-enter the driver through its ground pin.

This suggests to me that the Vcc network should be just as important as the GND network. Why isn't it?

If the bypass capacitors' connections were perfect, with no inductance, a good ground network would be adequate, and the return current "that must re-enter the driver through its power pin" (his words) would get bypassed to ground.  However, with the parasitic elements (particularly the connections' inductances which are unwanted and you cannot totally get rid of them), a good Vcc network will be a good supplement to the ground network, especially in the absence of an actual continuous ground plane.  Ideally the ground network and Vcc network would not have any AC voltage between them.  The reality is not the ideal though.

Osric wrote:

According to AN-147 from Renesas by Stanley Hronik:

Quote:

Ground Bounce levels are typically more pronounced than Vcc Bounce levels because of the HIGH to LOW transition is trying to quickly bring a HIGH signal down to a narrow window of <400mV for a logic LOW. A low output impedance is required to complete the transition quickly. In the LOW to HIGH, the only requirement is that the output be above 2.4V. 5V is available as a driving voltage. A much lower pull up impedance is required to make the transition quickly.

I haven't read the whole thing yet, but a search for "Ground Bounce levels are typically more pronounced than Vcc" doesn't turn up anything in that ap. note.  (Maybe it's because they have a <CR> in there somewhere that the search disqualifies, since it's a .pdf.)  However, this applies to TTL, which we usually don't use here.  In TTL, a logic-low output is required to be no higher than 0.4V, and logic-high output is required to be no lower than 2.4V.  For inputs, it's 0.8V max for low, and 2.0V min for high (which is still a logic-low state for most CMOS).  Note also that in TTL (like 74xx, 74LSxx, 74Lxx, etc.), the real current is passed in the low logic state, and a disconnected input basically pulls itself high.  CMOS (like 74HCxx, 74ACxx, etc., without a 'T' in there) is usually symmetrical, in voltage outputs and inputs, and in current drive, and the loads are the same in both states.

[Osric]

GARTHWILSON wrote:

Quote:

Ground Bounce levels are typically more pronounced than Vcc Bounce levels because of the HIGH to LOW transition is trying to quickly bring a HIGH signal down to a narrow window of <400mV for a logic LOW. A low output impedance is required to complete the transition quickly. In the LOW to HIGH, the only requirement is that the output be above 2.4V. 5V is available as a driving voltage. A much lower pull up impedance is required to make the transition quickly.

I haven't read the whole thing yet, but a search for "Ground Bounce levels are typically more pronounced than Vcc" doesn't turn up anything in that ap. note.

I make no claim to understanding this application note properly (it is already the subject of my misunderstanding of this same question in our own dialog higher up in this thread) and am sorry I failed to cite the page # of this paragraph - it's on Page 2 of the PDF, about 3 paragraphs in on the left column.

Figure 1 on the first page is also maybe of interest, as it shows that the Vcc bounce is smaller than the ground bounce on the board, but seemingly of the same size as the ground bounce on the die, and the figure seems to suggest a 3.3V component has 5V internally. Again my understanding of this AN is pretty weak/non-existant, so I could be misunderstanding the figure:

[Paganini]

GARTHWILSON wrote:

If the bypass capacitors' connections were perfect, with no inductance, a good ground network would be adequate, and the return current "that must re-enter the driver through its power pin" (his words) would get bypassed to ground.  However, with the parasitic elements (particularly the connections' inductances which are unwanted and you cannot totally get rid of them), a good Vcc network will be a good supplement to the ground network, especially in the absence of an actual continuous ground plane.  Ideally the ground network and Vcc network would not have any voltage between them.  The reality is not the ideal though.

Thanks Garth!

[Osric]

GARTHWILSON wrote:

Ideally the ground network and Vcc network would not have any voltage between them.  The reality is not the ideal though.

I've been struggling with this sentence for a while and eventually decided you must mean "Ideally the ground network and Vcc network would not have any voltage within them.". It's taken me a while to be sure, but I am pretty sure that is your intent; does that capture your intended meaning?

[GARTHWILSON]

Osric wrote:

GARTHWILSON wrote:

Ideally the ground network and Vcc network would not have any voltage between them.  The reality is not the ideal though.

I've been struggling with this sentence for a while and eventually decided you must mean "Ideally the ground network and Vcc network would not have any voltage within them.". It's taken me a while to be sure, but I am pretty sure that is your intent; does that capture your intended meaning?

I should have said "would not have any AC voltage between them."  I'll go back and edit my post.  Obviously they have to have the power-supply voltage between them.  But if you were to measure AC voltage from the ground net to the Vcc net at the same point on the board, ideally it would be zero.

[Osric]

Osric wrote:

Paganini wrote:

Hmm. I replied to this thread yesterday morning, but the toobz seem to have eaten it! Anyway, here (again) is a direct link to the All About Circuits online textbook: https://www.allaboutcircuits.com/textbook/

And here is a link to an article that seems pertinent to this thread: https://www.allaboutcircuits.com/techni ... impedance/

Thanks! In case other people might find it useful here is a link to the same content in PDF form:

https://www.ibiblio.org/kuphaldt/electricCircuits/

Thanks again for the reference.

Unfortunately I found all forms of the content a bit difficult to consume, so I reformatted it in a PDF (attached) that is friendly to the devices I have at hand -- a macbook, a phone, and an iPad. This PDF isn't really meant for printing; I set the page size to 5" x 7", which is an appealing ratio for 2-up display on a laptop screen and works reasonably on the tablet (my old eyes appreciate the large text) and is still legible on modern phones as their screens are so huge. If anyone bothers to read it and find errors in my formatting let me know and I'll typeset it again.

The PDF for Vol I is attached. It's a basic overview of DC concepts that is probably familiar to everyone on the forum. Its model of how/why current flows remains based on the flawed "marbles in a tube" analogy until Chapter 14, which treats capacitors. It could probably use the addition of both hands-on activities and exercises, but that would be a major undertaking.

[GARTHWILSON]

Osric wrote:

If anyone bothers to read it and find errors in my formatting let me know

I just gave it a quick scroll, and found that things don't line up correctly in the tables, for example on pages 591-592, and 595-596.  A search for ------- will turn them up, since a line of hyphens is used to separate rows, and they're not as wide as the characters in the rows.

[Osric]

GARTHWILSON wrote:

Osric wrote:

If anyone bothers to read it and find errors in my formatting let me know

I just gave it a quick scroll, and found that things don't line up correctly in the tables, for example on pages 591-592, and 595-596.  A search for ------- will turn them up, since a line of hyphens is used to separate rows, and they're not as wide as the characters in the rows.

Thanks! I couldn't figure out how to edit out the existing attachment, but uploaded a new one on the original post (and here, for clarity) which works around the issue, which existed in the original but managed to look less bad...

[Osric]

I'm only halfway through reading Vol II, as I know next to nothing about AC circuits so it's taking much more time to absorb. But the typesetting seems to have benefitted from the experience with Vol I, so I'll post it now.

[GARTHWILSON]

Osric wrote:

I'm only halfway through reading Vol II, as I know next to nothing about AC circuits

Once you know what an inductor does and what a capacitor does, AC analysis is initially a lot like DC analysis, except with complex numbers.  Complex just means they go on a graph instead of a number line.

[BigEd]

I see there's another video which helps visualise voltages and currents, which I posted at
Semi-OT: "watch electricity hit a fork in the road"

Paganini wrote:

BigEd wrote:

I think Dave Jones has done this - maybe this video, where he traces a Gigatron built two ways:
EEVblog #1176 - 2 Layer vs 4 Layer PCB EMC TESTED!

Quote:

What difference does a 4 layer PCB make to EMC radiated emissions compared to an identical 2 layer PCB? And why?

Dave does H-Field near-field probe testing on two otherwise identical PCB's.

Edit: Amusingly, it's excerpted here, as Dave himself was searching for it in his own content.

LOL! Thanks Ed. That's a great video, but not the one I was thinking of. In it, there was a machine that could visualize the current, so you could actually see the signal making its way towards the receiver, and the return current instantly following the signal as it worked its way through the trace.

[Osric]

GARTHWILSON wrote:

Osric wrote:

I'm only halfway through reading Vol II, as I know next to nothing about AC circuits

Once you know what an inductor does and what a capacitor does, AC analysis is initially a lot like DC analysis, except with complex numbers.  Complex just means they go on a graph instead of a number line.

For me it feels like there is more to it that matters to both my desire to understand radio and my interest in understanding crosstalk. Since every wire has some inductance and every signal path plus return path has some capacitance, it seems as though every trace in a PCB or wire on a breadboard is an antenna and resonant frequencies may play a role in crosstalk; Fourier analysis and FFTs are at best something where I recognize the words but definitely couldn't pass an exam. High frequencies should be required for these things to matter, but I don't have an intuition for how much they'd matter - for example, if something like a 14cm run of wire would resonate at 1Mhz, can that affect breadboard circuits? I don't know. It may not matter at all, or it may matter a lot; but either way, my lack of understanding means that it's not just a matter of applying calculus to the schematic, which is completely devoid of the details that I'd like to understand.

On the radio side there's no doubt that these things play a role in understanding how to design analog filters to receive certain stations, and while my main interest in radio is SDR (it's amazing what you can buy for not a lot of investment in SDR these days) the realities of antennas and antenna orientation cannot be ignored and require some actual thinking as I read through the AC book while the DC book was mostly "yes, I knew that" or "I don't need to know this" or even "I don't like how he explained this".