Design challenge: 6502-based EPROM programmer

For discussing the 65xx hardware itself or electronics projects.
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BillO
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Re: Design challenge: 6502-based EPROM programmer

Post by BillO »

Don't get me wrong, the original intent of this thread is an awesome idea .. but a tough nut to crack. At this point we just have some very early experimenting. We still do not have any process defined or concrete end goals to design toward. Indeed we're not even sure if it can be done.

If the idea is to help newbies get up and running quickly, the Arduino based concept is mostly already done with hardware and software designs ready for finishing touches.

The Arduino solution could be V1 and be available while work continues on the 6502 base solution.

I do use Arduinos, but not for the same thing that I use 6502s for. Arduinos are great from unsophisticated applications that you want up and running quickly. For instance I made an Arduino based water pump controller that has water pressure and available water supply (depth of water in well) as inputs and controls the pump and a water intake diverter valve as outputs. I put this together in 4 hours from concept to implementation. It works. How long would it take to do with a 6502 based system?

The 6502 and things like the Arduino are not mutually exclusive, they are very different and each has their sweet spot.
Bill
plasmo
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Re: Design challenge: 6502-based EPROM programmer

Post by plasmo »

I had a "Layout-A-Rama" session yesterday and layout 5 pc boards. One of them is Prog65 rev0, the exploratory version of 6502-based EPROM programmer. At the risk of confusing newbies, I did combine two designs into one layout. It is a EPROM programmer with jumpers T1-T4 in "up" position and T6 connected to T7; or it is a 6502 SBC with T1-T4 in "down" position and T6/T7 disconnected. T5 selects one of two bootROM images. In hindsight T5 should not be in the same physical group as T1-T4. Oh well, this is why it is an "exploratory" version.

In programming mode, EPROM is at low 32K, FT245R at top 16K, and RAM from 0x8000-0xBFFF; 6502's RDY is controlled by FT245R's RXF#. 6502 basically executes opcode as provided by PC via USB connection to FT245R. In normal mode, RAM is at low 32K, EPROM at top 16K, and FT245R from 0x8000-0xBFFF; 6502's RDY is pulled up, and FT245R's RXF# is connected to 6502's IRQ. In normal mode 6502 boots from EPROM and use FT245R as console I/O. That's all, a simple dual-purpose SBC with 6502/RAM/EPROM, FT245R as I/O, and 2 TTL logic. We'll see whether it even work...that's why there is ample prototype area.

Sent them off to JLCPCB last night, received an email this morning that they are all in production. We are cooking with gas now! (Actually its electricity is coal-powered). Six set of pc boards (55 boards) for $27, but shipping (DHL standard) is still more at $27.07. I think JLCPCB is in the wrong business.

Bill
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BigEd
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Re: Design challenge: 6502-based EPROM programmer

Post by BigEd »

I like it! Well done for going to (prototype) production - it will be interesting to see this develop.
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BigDumbDinosaur
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Re: Design challenge: 6502-based EPROM programmer

Post by BigDumbDinosaur »

plasmo wrote:
I had a "Layout-A-Rama" session yesterday and layout 5 pc boards.

Something to note when you do your next PCB layout is to, where possible, avoid 90 degree corners in narrow traces. During production, there is a tendency for the etchant to "gnaw away" at the outside of the corner and reduce the trace cross-section. All board manufacturing processes that use chemical etching have this problem to some degree. The solution is to use two closely-placed 45 degree corners.
Last edited by BigDumbDinosaur on Sat Nov 06, 2021 8:46 pm, edited 1 time in total.
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barrym95838
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Re: Design challenge: 6502-based EPROM programmer

Post by barrym95838 »

A bit of 7th-grade math tells me that the cross section is already larger by a factor of √ 2 at the corner, but your advice is well noted.
Got a kilobyte lying fallow in your 65xx's memory map? Sprinkle some VTL02C on it and see how it grows on you!

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drogon
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Re: Design challenge: 6502-based EPROM programmer

Post by drogon »

barrym95838 wrote:
A bit of 7th-grade math tells me that the cross section is already larger by a factor of root 2 at the corner, but your advice is well noted.
From what I was able to determine when I got back into making my own PCBs about 10 years back (after a 30 year break!), the whole right-angled thing is pretty much a non-event these days with todays etching methods and chemistry. (And a quick google pulls up dozens of 'debunks' now too)

45° and curves do make it prettier though. (To some).

-Gordon
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See my Ruby 6502 and 65816 SBC projects here: https://projects.drogon.net/ruby/
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barrym95838
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Re: Design challenge: 6502-based EPROM programmer

Post by barrym95838 »

Hand-drawn curves are my favorites, but that technique has fallen out of favor, for various obvious reasons. Mentioning "google" is likely to cause a stir and a grumble among several of the boomers here, so be careful. I have literally nothing to hide, so I don't mind if an AI algorithm snoops in on me, ostensibly to enhance my experience.
Got a kilobyte lying fallow in your 65xx's memory map? Sprinkle some VTL02C on it and see how it grows on you!

Mike B. (about me) (learning how to github)
rwiker
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Re: Design challenge: 6502-based EPROM programmer

Post by rwiker »

I find "river routing" quite pleasing to look at, at least in this case: https://tinyletter.com/jamesbowman/lett ... er-routing
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drogon
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Re: Design challenge: 6502-based EPROM programmer

Post by drogon »

barrym95838 wrote:
Hand-drawn curves are my favorites, but that technique has fallen out of favor, for various obvious reasons. Mentioning "google" is likely to cause a stir and a grumble among several of the boomers here, so be careful. I have literally nothing to hide, so I don't mind if an AI algorithm snoops in on me, ostensibly to enhance my experience.
Well I'm a 'boomer' too - google is almost generic though, like 'hoover'. I hoover the floor with a Dyson ... I google with duckduck go ...

-Gordon
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See my Ruby 6502 and 65816 SBC projects here: https://projects.drogon.net/ruby/
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BigDumbDinosaur
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Re: Design challenge: 6502-based EPROM programmer

Post by BigDumbDinosaur »

barrym95838 wrote:
A bit of 7th-grade math tells me that the cross section is already larger by a factor of √ 2 at the corner, but your advice is well noted.

It's more a problem with narrow traces, such as the 0.006” and 0.010” ones I use on many of my boards. On the 1/4” honkers used to distribute power it's usually not of much consequence.
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BigDumbDinosaur
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Re: Design challenge: 6502-based EPROM programmer

Post by BigDumbDinosaur »

rwiker wrote:
I find "river routing" quite pleasing to look at, at least in this case: https://tinyletter.com/jamesbowman/lett ... er-routing

It does have a certain amount of charm and beauty, but also represents time and effort better spent on other things.
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BigDumbDinosaur
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Re: Design challenge: 6502-based EPROM programmer

Post by BigDumbDinosaur »

drogon wrote:
45° and curves do make it prettier though. (To some).

Suitably-routed 45° "jogs" will also reduce the overall trace length. Every little bit helps when you crank up the clock. :wink:
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plasmo
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Re: Design challenge: 6502-based EPROM programmer

Post by plasmo »

Since my ancient autorouter does not have the miter option enabled, I've been using 90 degree corners for the last 3-4 years without issues. I relied on autorouter completely but do add extra power/ground traces afterward. The boards produced by JLCPCB and Seeeds Studio are very high quality so the day of pc board inspection prior to assembly is pretty much over. Having said that, I did encounter a defective board from JLCPCB right after they restarted production post COVID. A drop of acid had over-etched several traces and cut two traces. The disturbing part is the board apparently had passed the electrical test. It is only defective one I've encountered in hundreds of boards.
Bill
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plasmo
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Re: Design challenge: 6502-based EPROM programmer

Post by plasmo »

This is impressive: I uploaded pcb design files Friday evening (Albuquerque NM time), got a email from JLCPCB that production started Saturday morning, another email that production completed Sunday night, then a DHL email that boards were picked up Monday morning, and I just looked up DHL tracking and see it is already on a plane to Los Angeles. There is some chance I'll get the boards tomorrow! In that case that's just 4 days! There are 6 designs, 55 2-layer PC boards, 100mm X 100mm or smaller. $27 for board fabrication and $27 for DHL delivery, amazing!

Now I'll receive the board in a day or two, I've belatedly realized that I don't really know exactly how W65C02 expects the incoming opcode. Since I'm feeding 6502 each opcode starting from the negation of reset, I need to provide the exact sequence of instruction required. There are many one-byte instruction that takes two clocks to execute, so should I provide the same instruction twice or perhaps there is no dummy cycle, just one valid instruction fetch? What about a JUMP absolute instruction that is 3 bytes long but takes 4 clock cycles to execute, do I feed it 0xC4, low_addr, high_addr, and dummy_byte? or maybe there are only 3 valid cycles so I don't need to pad it with a dummy_byte?

Like they've said, "The devil is in the details".

Bill
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Re: Design challenge: 6502-based EPROM programmer

Post by GARTHWILSON »

plasmo wrote:
I've belatedly realized that I don't really know exactly how W65C02 expects the incoming opcode. Since I'm feeding 6502 each opcode starting from the negation of reset, I need to provide the exact sequence of instruction required. There are many one-byte instruction that takes two clocks to execute, so should I provide the same instruction twice or perhaps there is no dummy cycle, just one valid instruction fetch? What about a JUMP absolute instruction that is 3 bytes long but takes 4 clock cycles to execute, do I feed it 0xC4, low_addr, high_addr, and dummy_byte? or maybe there are only 3 valid cycles so I don't need to pad it with a dummy_byte?
JMP absolute (which is $4C, not $C4) takes three cycles, not four. Two-cycle instructions like TAX don't care what's on the data bus in the second cycle. WDC's 65816 data sheet has a table of exactly what's on the buses in every cycle of every instruction, and applies to the '02 as well, using footnotes to separate the various conditions.
http://WilsonMinesCo.com/ lots of 6502 resources
The "second front page" is http://wilsonminesco.com/links.html .
What's an additional VIA among friends, anyhow?
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